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WFA Full Reference Design

$500K
In stock
SKU
WFA-BLUEPRINT-PACK

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Build-out tier. Schematic + RTL specification + design-verification vector library + integration guide + host-side reference driver source. The OEM's hardware team plans against shipping silicon. One year of inventor email support, two written virtual reviews. USA only.
First to market

Publicly online since 2010 · U.S. patent applications since 2012 · inventions offered since 2014. The work of Christopher Gabriel Brown, independently documented.

First posted: · Last updated:

WFA-BLUEPRINT-PACK — Full Reference Design ($499,999)

The build-out tier. The complete WFA reference design — schematic, register-transfer-level (RTL) specification, design-verification (DV) vector library, integration guide, host-side reference driver source — engineered for the original-equipment manufacturer (OEM) whose hardware team will own the productization of a WiFi Accelerator-class product under their own brand and supply chain. WFA-BLUEPRINT-PACK ends the evaluation and dev-kit phases and begins the build phase. The buyer's hardware team can plan against shipping silicon: they design their host board around the WFA-Node pin contract, they specify their printed circuit board fabrication, they specify their final assembly, they write the production driver against the wire protocol, and they architect their cert program — all from a deliverable that gives them the engineering inputs to do every step.

Who this tier is for

The original-equipment manufacturer's hardware team that has committed to a WiFi-Accelerator-class product in the company's roadmap. The systems integrator engaged by a single end customer to deliver a vertically integrated cluster appliance built around WFA silicon. The defense or industrial-controls house that needs a deterministic-latency Wi-Fi data path for its rugged or hardened product line. The hyperscale-edge operator standing up its own custom point-of-presence hardware and needs the radio under its own control rather than a commodity vendor's. The original-design manufacturer (ODM) whose customers are those organizations.

Not for the buyer who is still evaluating (WFA-SPEC) or whose firmware team needs only to verify drivers against the protocol (WFA-DEV-KIT). Not for the buyer who intends to redistribute the WFA design to other organizations (redistribution is prohibited). Not for the buyer who lacks an in-house chip-program manager or RTL-experienced engineering team — the BLUEPRINT-PACK is a build-grade deliverable that assumes the buyer's organization can carry it to production.

What you get at this tier

  • The complete WFA-Node reference-board KiCad design package. Schematic with manufacturer-specific footprints, layout-ready netlist, full bill of materials with second-source candidates per part. Layout discipline notes for the high-speed RF, QSPI, and host-SPI paths. Antenna design files for the integrated 6 GHz inverted-F PCB antenna.
  • The synthesizable RTL specification for the WFA-Node digital blocks. Fabric framing engine (JSON-Lines + length-prefixed binary tunnel parser at line rate), crypto cluster (SHA-256, HMAC-SHA-256, AES-256-GCM, X25519, TRNG), NVRAM burst writer (QSPI master with fsync-on-write semantics), aggregated descriptor rings (high-priority and aggregated, per-direction), watchdog and power management. Block-level register maps, interface contracts, and timing budgets specified to the register-transfer level. The buyer's RTL team or contracted RTL house implements the HDL against this specification.
  • The design-verification (DV) vector library. Two hundred fifty-plus golden vectors covering every wire-protocol boundary, every crypto operation, every descriptor-ring corner, every event-log write path. Compatible with cocotb, UVM, and VUnit testbench frameworks. Includes the same JSON-Lines and tunnel-frame corpora used by the inventor to verify the dev-kit emulation against the UniPhi DC software path, plus a hardware-side corpus covering the fabric-aware MAC scheduler's traffic-class policy decisions.
  • The host-side reference driver source. A Linux kernel-bypass-style driver written in C, with NVMe-style queue and completion-ring semantics, against the WFA-Hub PCIe Gen3 ×1 host bus. A Windows analogue covering the SPI host bus path of WFA-Node. Both delivered with build scripts, test harness, and integration notes against the UniPhi DC software fabric as the canonical host application.
  • The integration guide. A 100-plus-page document covering host-board layout in concrete detail (stackup, impedance control, RF reference design, antenna placement, regulatory keepout, decoupling specifications), production-test plan (per-board ICT vectors, JTAG boundary scan, RF return-loss measurement, host-bus loopback, end-to-end protocol verification), failure-analysis playbook, ESD and EMI mitigation, supply-chain considerations (foundry options outside AutoPhi if the buyer chooses to engage a different foundry — at the buyer's own cost and risk).
  • The bring-up bench plan. The exact sequence the inventor recommends for first-silicon bring-up: power-rail confirmation, JTAG attachment, boundary scan, crystal verification, ROM debug print, QSPI verification, SHA-256 vector check, AES-GCM vector check, host SPI loopback, RF path measurement, 802.11ax association to a reference AP, end-to-end protocol verification against the dev-kit's golden vectors.
  • The complete WFA-SPEC and WFA-DEV-KIT-equivalent documentation (every document from those tiers, current revision).
  • One year of inventor email support from the date of delivery. The inventor answers wire-protocol questions, RTL specification clarifications, integration questions, layout reviews (up to four written reviews of the buyer's draft layout files), and bring-up support. The inventor reads, diagnoses, and writes back personally; the answers become a part of the buyer's engineering record.
  • Two on-site-equivalent virtual reviews during the year — one at draft-layout-freeze, one at first-silicon-bring-up. Each is delivered as a written technical-review report of fifteen-plus pages from the inventor based on the buyer's submitted artifacts.

The design-target performance the BLUEPRINT-PACK is engineered to deliver

The same WFA-line design targets that drive the SPEC and the DEV-KIT, plus the silicon-side targets the BLUEPRINT-PACK is the contract for.

Metric Commodity baseline WFA target
Deploy latency p99~100 ms<10 ms
mTLS handshake p99~80 ms<1 ms
Replication throughput (16 MB, N=3)~23 MB/s>200 MB/s
Concurrent nodes per radio~8 practical64+
Host CPU at saturation~70%<10%
Typical power (Node SKU, 22 nm target)~600 mW (ESP32-S3 active)~150 mW typ.
Die area (Node SKU)~25 mm² typical for an ESP32-S3-class SoC~12 mm² at 22 nm

Production path from BLUEPRINT-PACK to shipping product

The buyer's path from delivery to shipping product typically follows four phases. Phase one — host-board design (two to four months): the buyer's hardware team uses the schematic, the integration guide, and the inventor's draft-layout review to produce the buyer's host board built around the WFA-Node pin contract. Phase two — RTL implementation (three to six months): the buyer's RTL team or contracted RTL house implements the synthesizable HDL against the BLUEPRINT-PACK's RTL specification, verified against the DV vector library. Phase three — foundry engagement (varies): the buyer either engages AutoPhi at the FOUNDRY-PARTNER tier or engages a foundry of the buyer's choice at the buyer's own cost. Phase four — bring-up and cert (three to six months): the buyer brings up first silicon against the BLUEPRINT-PACK bring-up bench plan, conducts FCC Part 15 testing, conducts Wi-Fi Alliance cert (if the buyer wants the trademark), and enters production.

The total program from BLUEPRINT-PACK delivery to first shipping product is typically eighteen to thirty-six months, depending on the buyer's organization, the chosen foundry, and the cert program. The one-year inventor support window covers the design-and-implementation phases; renewal beyond the year is negotiated per buyer.

What is NOT included

  • Redistribution rights. Reselling or redistributing the WFA reference design to third parties is prohibited. The buyer ships product under the buyer's own brand; the buyer does not become a WFA design-house reseller.
  • The right to claim authorship. Marketing language such as "WFA Inside" or "WiFi Accelerator design" is allowed. "Designed by [buyer's name]" with respect to the underlying reference design is not.
  • The channel to AutoPhi. AutoPhi engagement happens at the WFA-FOUNDRY-PARTNER tier.
  • Wi-Fi Alliance trademark. The buyer's organization joins WFA membership and conducts per-product cert separately, at the buyer's cost.
  • FCC Part 15 certification. The buyer's responsibility per shipped product.
  • Real-time support. Email-only, including the year-long window and the two virtual reviews.
  • International sale. USA-only. USD only. The buyer's eventual products may be sold internationally subject to the buyer's own cert and export-control compliance.

System requirements for the buyer's program

  • An in-house chip-program manager or equivalent.
  • An RTL engineering team or a contracted RTL house with experience implementing mixed-signal digital blocks against an external specification.
  • A board-level hardware team with experience laying out RF / digital / power-mixed printed circuit boards at the QFN-56 form factor and the 6 GHz Wi-Fi band.
  • A relationship with a foundry — either AutoPhi (via WFA-FOUNDRY-PARTNER) or the buyer's foundry of choice.
  • A pathway to FCC Part 15 testing and Wi-Fi Alliance cert (in-house, contracted, or via a test-house partner).
  • A working email account at which to receive the deliverables packet and conduct the year-long support thread.

How to order

Email christopher@cri-one.com with subject WFA — WFA-BLUEPRINT-PACK. Identify the buyer's organization, the program manager, the intended product, the expected production volume, and the buyer's preferred foundry path (AutoPhi via WFA-FOUNDRY-PARTNER, or another foundry at the buyer's own cost). The inventor responds with payment arrangements and a draft written agreement within one business day. Delivery is by email and secure file transfer once payment clears and the written agreement is signed.

Postal contact:
Christopher Gabriel Brown
1341 Wellington Cove
Lawrenceville, GA 30043-5255
United States

Patent-pending. USA-only sales. United States Dollars only. Email-only contact.

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