WiFi Accelerator Developer Kit
Publicly online since 2010 · U.S. patent applications since 2012 · inventions offered since 2014. The work of Christopher Gabriel Brown, independently documented.
WFA-DEV-KIT — WiFi Accelerator Developer Kit ($24,999)
The build-against-the-WFA-protocol-today tier. WFA-DEV-KIT delivers commodity hardware running a firmware emulation of the WFA host-bus protocol — so the buyer's firmware team can write drivers, build integration layers, and verify host-side software against the WFA wire contract before first silicon arrives from the foundry. The kit collapses the eighteen-to-thirty-six-month silicon-program waiting room into a productive engineering activity from day one. Every command, every descriptor ring, every interrupt-gating boundary, every fabric-framing-engine transaction the buyer's host code will eventually send to real WFA silicon is exercisable today against the dev-kit, with cycle-accurate response shapes for the deterministic parts of the protocol and bounded approximations for the radio-side timing.
Who this is for
The chip-program-aligned firmware team that needs to begin host-software development the same week the chip program kicks off. The platform-engineering team at an OEM that has committed to WFA at the BLUEPRINT-PACK or FOUNDRY-PARTNER tier and now needs to staff up host-side work without waiting for first silicon. The integration team at a systems integrator that wants to characterize the WFA wire contract against the integrator's own host platform, scheduler, and storage stack. The driver-development house whose clients are multiple WFA-integrating OEMs and needs reference hardware to develop the driver against.
The kit is not for the buyer who only wants to read the specification (the WFA-SPEC tier is correct for that). It is not for the buyer who has decided to ship a product based on the WFA reference design but does not yet need running hardware in front of their firmware team (the WFA-BLUEPRINT-PACK tier delivers the schematic, the RTL spec, and the DV vector library; the dev-kit is the natural companion).
What you get at this tier
- The dev-kit hardware. One assembled and bench-tested board carrying an ESP32-S3 module (acting as the 802.11ax radio), an ECP5 or Tang Primer 25 K-class FPGA development board (running the emulated WFA digital block: the fabric framing engine, the crypto cluster, the descriptor rings, the NVRAM burst writer), a QSPI flash for the emulated event-log path, an I2C ID-EEPROM for canonical-peer-id semantics, a USB-C power and console port, a JTAG header, and a status-LED bank. The board is form-factor-comparable to a development reference design: roughly 100 millimeters by 80 millimeters, two-layer FR4, ENIG finish.
- The dev-kit firmware. The ESP32-S3 Arduino sketch that brings up the radio path, joins a residential Wi-Fi network, and exposes the WFA host-side SPI surface; the FPGA bitstream that runs the emulated digital blocks (fabric framing engine, crypto cluster, descriptor rings, NVRAM burst writer); the bench-test report from the inventor demonstrating round-trip wire compatibility against the UniPhi DC software fabric.
- The wire-protocol decoder library. A Python package that decodes WFA host-SPI traffic into structured Frame objects so the buyer's firmware team can validate their driver's output against the canonical contract. Wireshark dissector script for live capture analysis. Set of fifty curated golden vectors (the same vectors used by the inventor to verify the emulation against the UniPhi DC software path).
- The complete WFA-SPEC document package (everything listed under the WFA-SPEC tier). The SPEC, PRODUCT_BRIEF, STRATEGY, MANIFEST, the WFA-Node KiCad schematic, the LAYOUT_HINT process notes.
- Sixty days of inventor email support from the date of delivery. The buyer's firmware team can ask the inventor about wire-protocol corners, emulation fidelity, bench-test methodology, and driver-development practice. The inventor answers personally and in writing.
- Bench-test report. A written record from the inventor of every measurement taken on the kit before shipping: pin-level continuity, ESP32-S3 association to a reference access point, FPGA bitstream verification, SPI clock-frequency walk, host-side decoder agreement against the golden vectors.
What the dev-kit faithfully emulates
- Wire protocol on host SPI — bit-for-bit. The descriptor ring layout, the interrupt gating model, the fabric framing engine's input and output shapes, the crypto cluster's command and result formats, the NVRAM burst writer's doorbell semantics. Driver code written against the dev-kit will drop unmodified into a real WFA-Node silicon system once the silicon arrives.
- Crypto cluster timing — within a bounded factor. The FPGA implementation runs at lower clock than the eventual 22-nanometer silicon, so absolute latencies are higher. The relative cost between operations (an HMAC versus an AES versus an X25519) tracks within ±20 percent.
- Event-log behavior — bit-for-bit. The QSPI burst-writer pipeline matches the silicon contract end-to-end. Events written via the dev-kit pass the same hash-chain verification a real silicon system would.
What the dev-kit does NOT faithfully emulate
- Absolute radio performance. The ESP32-S3's PHY is real 802.11ax silicon, but the WFA-Node target's fabric-aware MAC scheduler is approximated in dev-kit firmware running on the ESP32-S3 application processor — adequate for driver development, insufficient for measuring the eventual silicon's deploy-latency design target.
- Power profile. An ESP32-S3 plus an FPGA development board draws several watts; the eventual WFA-Node silicon target is approximately one hundred fifty milliwatts typical. Power-and-thermal characterization is impossible against the dev-kit.
- RF cert path. The dev-kit is engineering hardware, not a Wi-Fi-Alliance-certified or FCC-Part-15-certified shipped product. Reseller use is prohibited.
Design target the dev-kit verifies progress against
The same WFA-line design targets the WFA-SPEC document describes. The dev-kit lets the buyer's firmware team make measurable progress toward those targets by exercising the host-side software stack against the wire contract.
- Deploy-latency p99 target <10 milliseconds (vs ~100 milliseconds commodity baseline).
- mTLS handshake p99 target <1 millisecond (vs ~80 milliseconds commodity baseline).
- Replication throughput target >200 megabytes per second user-visible (vs ~23 megabytes per second baseline).
- Concurrent nodes per radio target 64+ (vs ~8 practical baseline).
- Host CPU at saturation target <10 percent (vs ~70 percent baseline).
What is NOT included
- The right to ship a product based on the dev-kit emulation as production silicon. The dev-kit is for R&D and integration verification. Shipping product requires the BLUEPRINT-PACK tier and, for fabrication, the FOUNDRY-PARTNER tier.
- The synthesizable RTL source for the WFA digital blocks. The FPGA bitstream is delivered as a verified binary; the underlying RTL stays with the inventor until the buyer engages at BLUEPRINT-PACK.
- The right to redistribute the dev-kit, the firmware, the bitstream, or the decoder library. Internal use within the buyer's organization only.
- Wi-Fi Alliance trademark. Not transferred.
- FCC Part 15 certification. The dev-kit is engineering hardware; it is not a shipped product.
- Telephone or video support. Email only.
- International sale or shipment. USA-only. USD only.
- Replacement hardware after the support window. The dev-kit is sold once; the buyer is responsible for its care after the sixty-day support window closes.
System requirements for the buyer's bench
- A bench setup with USB-C power, an unobstructed 6 GHz Wi-Fi link to a reference access point, and at least one workstation running the buyer's host-side toolchain.
- JTAG programmer if the buyer's firmware team intends to bring up custom builds on the ESP32-S3 or the FPGA. The dev-kit ships pre-programmed; reflashing is the buyer's responsibility.
- Python 3.10 or later for the decoder library and the bench-test scripts.
- A working email account for the support thread with the inventor.
How to order
Email christopher@cri-one.com with subject WFA — WFA-DEV-KIT. Identify the buyer's organization, the engineering team that will use the kit, and one sentence of context about the intended driver / integration work. The inventor responds with payment arrangements within one business day. Delivery is physical (USA only, USPS or carrier of buyer's choosing at buyer's cost above shipping included) plus email for the firmware, the bitstream, the decoder library, and the SPEC package.
Postal contact:
Christopher Gabriel Brown
1341 Wellington Cove
Lawrenceville, GA 30043-5255
United States
Patent-pending. USA-only sales. United States Dollars only. Email-only contact.
