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APM12-D-QPHY — Quantum PHY link controller (2 nm, IFS 14A)

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APM12-D-QPHY

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APM12-D-QPHY — AutoPhi Modern APM12 generation of the QBeam classical-fabric link controller. 2 nm on IFS 14A, 4000 GB/s aggregate design target. Variant of APM01-D Nexus Core with 4x QBeam classical-mode lanes. Foundry-ready (L4).
First to market

Publicly online since 2010 · U.S. patent applications since 2012 · inventions offered since 2014. The work of Christopher Gabriel Brown, independently documented.

First posted:

APM12-D-QPHY — Quantum PHY link controller (2 nm, IFS 14A)

APM12-D-QPHY is generation 12 of the AutoPhi Modern APM-D-QPHY line — a variant of the APM01-D Nexus Core (Data Processing Unit) in which the baseline 2× 400 GbE MACs are replaced with 4× QBeam classical-mode PHY lanes and augmented with a PCIe 5.0 x16 endpoint plus per-lane AES-256-GCM. The die is fabricated at 2 nm on IFS 14A using IFS-14A-PDK-v0, following Path B (Synopsys DC + ICC II + Calibre). Design target: 4000 GB/s aggregate, 18000x the APM01 baseline.

Drop-in mechanically compatible with the reference Quantum PHY HBA. Reference HBA ships APM07-D-QPHY by default; this SKU is offered for buyers who want a different point on the AutoPhi Modern generational fade.

Scientific basis

The QBeam physical layer (from the ExitPhi patent application, USPTO Application 19/722,805) has three carrier-agnostic properties that hold whether the modulated payload is quantum or classical: CoolBeam thermal integrity (-40 °C to +85 °C without active cooling), PipeBeam temporal alignment (±8 mil lane skew absorbed without retraining), and cable-free density (4 lanes on a single-slot HHHL bracket). This SKU exposes those three properties for classical byte transport at the 2 nm process node.

Specifications

Product codeAPM12-D-QPHY
FamilyAutoPhi Modern
SlotD (Data Processing Unit / Nexus Core, QBeam classical-fabric variant)
GenerationAPM12
Base chipAPM01-D Nexus Core
Variant delta2× 400 GbE MAC replaced by 4× QBeam classical PHY; +PCIe 5.0 x16 EP; AES-256-GCM per-lane
Process2 nm
FoundryIFS 14A
PDKIFS-14A-PDK-v0
EDA flowPath B (Synopsys DC + ICC II + Calibre)
Submission modeFull mask
Die side6.75 mm (square)
Die thickness12.0 mm
Active layers2400-3430
Peak aggregate bandwidth4000 GB/s (design target)
MAC clock156.25 MHz
PHY clock312.5 MHz
Fade vs APM0118000x
List priceUSD $2,000,000,000 per die

Wire protocol (QPHY-P1)

APM12-D-QPHY runs the QPHY-P1 wire protocol as defined in the Quantum PHY package. QPHY-P1 frames a 32-bit routing header, a 16-byte payload prefix (opcode, virtual channel, sequence, transaction ID, length), a 64 B to 4 KiB payload body, and a 128-bit AES-256-GCM authentication tag. RS(255, 239) forward error correction is applied per lane. Credit-based flow control uses 64 credits per virtual channel across 8 virtual channels. Frames are striped across the four QBeam lanes at 8-byte granularity and PipeBeam-realigned at the receiver.

Nine Ultimate Technologies (AutoPhi Modern contract)

All nine Ultimate Technologies of the AutoPhi Modern family are present on this die: LED Power Recycling, Vertical Threading, Chiplet Stacking, Nanophotonic Data Flow, Quantum Error Correction, Electromagnetic Cooling, Quantum Battery Layers, Quantum-Classical Hybrid, and Neuromorphic AI Engine. The QPHY variant retains all nine and adds the classical-mode QBeam PHY lane replacement described above.

Foundry-ready deliverables (per this SKU)

  • FOUNDRY_HANDOFF.md — 44-line canonical AutoPhi handoff for APM12-D-QPHY
  • manifest.json — machine-readable per-SKU manifest
  • STORE_LISTING.md — per-SKU store copy source
  • store_description.html — per-SKU HTML for the live product page
  • synth.sdc — 2 nm-specific synthesis constraint overlay (clock periods, drive strengths)
  • floorplan.tcl — 6.75 mm die floorplan overlay
  • pnr_config.tcl — IFS 14A place-and-route configuration overlay

Shared with the whole Quantum PHY package

  • Full APM01-D-QPHY RTL (Verilog: qphy_top, qphy_pcie_ep, qphy_dma, qphy_mac, qphy_crypto, qphy_pipebeam, qphy_phy with classical-mode strap, qphy_doorbell)
  • Baseline synthesis constraints (SDC), Yosys script, OpenLANE config
  • Baseline floorplan and P&R configuration
  • DV harness with unit + integration testbenches; make sim and make cov targets
  • PCIe 5.0 x16 HHHL reference board: SPEC + BOM + STACKUP (12-layer FR-4 Tg170)
  • Link-layer firmware in C + host daemon in Rust (qphyd)
  • SDK: C header (libqphy) + Python bindings + Rust crate
  • Wire protocol specification (QPHY-P1), host driver ABI, fabric topology catalog
  • Deployment playbook for chassis / rack / row / facility scales
  • FOUNDRY_STANDARDS matrix covering all 12 generations (foundry, PDK, EDA flow, cost model)

Compatibility

  • Fits any AutoPhi Modern chassis slot that accepts a D-slot chip
  • Bootstraps via the same Light-Trigger boot sequence as the baseline APM01-D
  • Interoperates with sibling APM12-S / R / T / I / V / L / N / Q / E on the nanophotonic card-to-card link
  • Reports as APM12-D-QPHY in the chassis discovery register

Foundry submission

Package is designated Foundry-ready (L4). Full RTL, synthesis constraints, floorplan, DV testbench, and the 44-line canonical FOUNDRY_HANDOFF are on file. Physical-design flow output present. Buyer signs the full-mask contract (Path B) directly with the foundry. Cost model in the FOUNDRY_STANDARDS document ranges from ~$50k NRE (sky130 MPW) through ~$18M NRE (IFS 14A full mask); this SKU's target flow is Path B (Synopsys DC + ICC II + Calibre).

US export & compliance

Configurations at 5 nm and below are subject to US EAR / BIS export controls. Buyer is responsible for compliance. Handled under standard DFARS trusted-foundry framework via IFS. America-First restriction: US-only sale; foundry outside USA requires written inventor consent case-by-case.

What this purchase conveys

Documentation and commercialization rights — not intellectual property. The QBeam patent (via ExitPhi, USPTO Application No. 19/722,805) and all underlying IP remain the sole and exclusive property of Christopher Gabriel Brown. This is not a patent license or assignment.

Terms

USD $2,000,000,000 per die at inventor-set list, before the buyer's foundry cost. Included at no extra charge inside All In One (20T). Available only to companies incorporated, headquartered, and primarily operating in the United States. USD only. Patents and underlying IP retained by the inventor. Final sale. Governing law: State of Georgia, USA.

Christopher Gabriel Brown — christopher@cri-one.com · crioneaka@outlook.com. Communication by email and postal mail only — no phone calls, no brokers, no intermediaries.

APM12-D-QPHY. Generation 12. 2 nm. IFS 14A. Foundry-ready.

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