Project 27 — AutoPhi Scale Ultimate: Deep Dive
First published Feb 6, 2026 on christophergabrielbrown.com. Some details, such as prices, offers and links, have changed since it first went online.
Project 27 is the ceiling of the AutoPhi Scale line: a single amended design that re-makes Scale Plus (25) and Scale Pro (26) inside one chip and carries forward Scale Series (24) full technology stack. This article is a deep dive into what 27 is, how it is built (RTL, segments, voxel die building, synthesis, OpenLANE), what has been delivered (including segment GDSII and LEF in-repo), and how it scales horizontally, vertically, and in the third dimension with vertical chiplet stacking.
1. What Project 27 Is
Scale Ultimate is one design. It incorporates:
- From 24: Full Ultimate Technology Integration — all nine interfaces.
- From 25: Scale Plus tier — 2× fractional, 1.754 EFLOPS, 536M+ threads, 128 qubits (documented).
- From 26: Scale Pro core — re-made in 27 as the RTL: 4× fractional, 3.508 EFLOPS, 1.07B+ threads, 256 qubits.
Form factor: 10 mm × 10 mm (100 mm²). Segments at 1 mm or 2 mm are built and multiplied (N×M in plane, vertical chiplets in Z).
2. Ultimate Technology Integration — Nine Technologies
LED Power Recycling (90% efficiency), Vertical Threading (12K TSVs/mm², 125 TB/s), Chiplet Stacking (500 layers, 18 per stack), Nanophotonic Data Flow (1,400 TB/s, 2,800 channels), Quantum Error Correction (99.998%, 1,400 logical qubits), Electromagnetic Cooling (97%, 32 thermal zones), Quantum Battery Layers (20 layers, 1,500 Wh, 75 MW burst), Quantum–Classical Hybrid, Neuromorphic AI Engine. All referenced and implemented in RTL.
3. CPU Tiers
Scale Plus (25): Documented; selectable in future variants. Scale Pro (26): Primary — RTL in 27 (hybrid_pro_top, light_pro_core, quantum_pro_core).
4. RTL Architecture
autophi_scale_ultimate_accelerator_integration.v — Full-stack top with all nine tech interfaces. autophi_hybrid_pro_top.v — Single hybrid (Light-Pro + Quantum-Pro). autophi_light_pro_core.v, autophi_quantum_pro_core.v — Cores. autophi_scale_ultimate_tiled.v — N×M segments. autophi_voxel_grid.v, autophi_voxel_blank.v — Voxel die building (multiple types, checkerboard or all-HYBRID).
5. Segments and Stacks
Build segments (1 mm or 2 mm) once; multiply in X and Y (horizontal stacks) and in Z (vertical chiplets). Total segments = (N_seg_x × N_seg_y) × N_layers. Scripts: run_openlane_nix_segment.sh (1 mm), run_openlane_nix_segment_2mm.sh (2 mm), run_openlane_nix.sh (full 10 mm).
6. Voxel Die Building
Die as grid of voxels (HYBRID, LIGHT, QUANTUM, BLANK, future IO/MEMORY/INTERCONNECT). Multiply and add: horizontal, vertical, diagonal, cross, and Z (vertical chiplets). Patterns: rect, checkerboard, diagonal bands, cross. RTL: voxel_grid (VOXEL_PATTERN 0 = all HYBRID, 1 = checkerboard), voxel_blank.
7. Implementation Flow
Synthesis: run_synthesis.sh / run_synthesis.bat → Yosys (Light, Quantum, Hybrid, Tiled, Voxel grid). OpenLANE: Configs for full 10 mm and segment 1 mm/2 mm. One segment run completed to GDSII; GDSII and LEF in deliverables/segment_run/.
8. Deliverables and Handoff
Repo contains: RTL, synthesis netlists, OpenLANE configs and scripts, constraints, docs, and deliverables/segment_run/ (autophi_hybrid_pro_top.gds, .klayout.gds, .lef). Burning the 27 folder gives a complete, self-contained handoff.
9. Twelve Product Types and COGS
Twelve types from 130nm proof and MicroSDXC through 14nm single-die to Scale Ultimate 10 mm×10 mm and REV accelerators. Low COGS and high manufacturing probability documented. Type 8 = Scale Ultimate (27).
10. Status
Done: RTL, synthesis, OpenLANE segment to GDSII, segment GDSII/LEF in-repo, docs, handoff notes. Next: use segment for N×M multiply, vertical chiplet layers, optional LIGHT/QUANTUM voxel wrappers and diagonal/cross interconnect.
Project 27 — AutoPhi Scale Ultimate. Path: C:\work\27-autophi-scale-ultimate. Inventor: Christopher Gabriel Brown. Store: AutoPhi Scale Ultimate 12[dead link]