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The Origin of Additional Socket Secondary Level Chips — Computing & Semiconductors Series — Invent Deposition #1189
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FIRST TO MARKET · Publicly documented in the 2017 Invent Depositions corpus · Deposition #1189.
“additional socket and secondary level chips of a software written multiple level chip assembly to print and stack construction chips in a link and exchange processing manner by cubit cell and cubit grid copyright (c) 2017 chris gabriel brown”
— Christopher Gabriel Brown
Recognized properties
- Sector: Computing & Semiconductors
- Keywords: level, chips, cubit, additional, socket, secondary, software, written, multiple, chip, assembly, print
- Key phrases: additional socket · secondary level chips · stack construction chips · exchange processing manner · cubit grid
Provenance: original 2017 catalog artwork recovered from buyinvent.com via the Internet Archive Wayback Machine; OCR text from the printed Invent Depositions book scan (Deposition #1189).
© Christopher Gabriel Brown · Patent Pending · IP retained by CRI-ONE
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