77-qphy-pcie-card
Asset valuation: $5,600,000,000. Project 77 · cri-one.com portfolio · Author: Christopher Gabriel Brown A PCIe 5.0 x16 half-height half-length add-in card that hosts a QBeam-enabled chip on-board. Aligned with the ExitPhi patent filing (USPTO App# 19/722,805): the chip's FCBGA package-top metallic
Think of a card with nothing on its bracket but one small light. The QPHY PCIe Card is a half-height, half-length PCIe 5.0 x16 add-in card that carries one QBeam-enabled chip, and that chip talks to its neighbors through the metal on top of its own package. That metal is an RF phased-array antenna for chip-to-chip data and also the cold side of a thermoelectric cooling pump called CoolBeam, so there is no heatsink either, only the slot's ordinary airflow. The PCIe fingers carry host control and DMA; everything chip-to-chip goes over the air to peer QBeam chips in nearby cards, chassis or racks, with PipeBeam keeping delivery in order and AES encryption on the link. The filed patent says it plainly: the only lasting physical attachment to such a chip is a power conductor.
This is the wireless sibling of the cabled Quantum PHY line in project 76: datacenter operators who want a deterministic wired topology choose 76, those who want cable-free density choose this card, and the driver, C SDK, Python bindings and Rust crate are the same on both. The channel is a classical wireless link by default; where a deployment provisions a pre-distributed entanglement source, the on-die pool lets the same channel carry teleported qubits as well. The package is foundry-ready, with the full spec, bill of materials and 12-layer stackup on file, checked against the ExitPhi filing. The buyer takes it to a contract manufacturer for layout, fab, PCIe and RF-emissions compliance and the silicon tape-out; the patent stays with the inventor.
Description
77 — QPHY PCIe Card
SKU: QPHY-PCIE-CARD | Price: USD $3,000,000,000 per card | Categories: Quantum PHY (3414), Space & Defense (145) | Inventor: Christopher Gabriel Brown
Patent dependency (filed, non-provisional utility, pro se): USPTO Application 19/722,805 — INTEGRATED WIRELESS DATACENTER FABRIC WITH PHASED-ARRAY COOLING ANTENNA, ORDER-PRESERVING ANTENNA SERIES, AND QUANTUM-TELEPORTATION PROTOCOL ATOP A SHARED CLASSICAL CHANNEL (ExitPhi). Filed 2026-06-27. 30 claims. Confirmation 4017. Patent Center 77974071. Canonical source for QBeam, CoolBeam, and PipeBeam technologies used in this card.
Status: Foundry-ready (L4). Full SPEC + BOM + 12-layer STACKUP on file. Physical-design flow output present. QBeam is a filed non-provisional USPTO utility patent. Patent alignment verified against ExitPhi patent text. Host driver ABI, C/Python/Rust SDK, and wire-protocol framing reused verbatim from project 76. KiCad schematic capture, PCB layout, prototype fab, PCIe 5.0 compliance, FCC/ETSI RF-emissions compliance, and QPHY-W silicon tape-out are buyer/CM/cert-lab scope.
Overview
QPHY PCIe Card is a PCIe 5.0 x16 half-height half-length (HHHL) add-in card that hosts a single QBeam-enabled chip on-board. It is the patent-canonical PCIe form factor for the ExitPhi wireless datacenter fabric invention (USPTO App# 19/722,805). The chip’s FCBGA package-top metallic structure serves simultaneously as the RF phased-array antenna for wireless chip-to-chip data and as the cold-side terminal array of a vertical thermoelectric cooling pump (CoolBeam).
There are zero data cables on the bracket . The bracket carries only a bicolor status LED and a service-only USB-C port (unpopulated by default per the patent’s “service-port physical attachment used solely during manufacturing” clause). PCIe fingers carry only host-to-chip control and DMA traffic. All chip-to-chip communication travels wirelessly through the package-top antenna to peer QBeam chips in nearby cards, chassis, or racks. This card is faithful to the ExitPhi patent which specifies that “the only persistent physical attachment to a chip or to a rack-unit so equipped is an electrical power conductor.”
The card sits alongside — not inside — the Quantum PHY 13-SKU cabled HBA product line (project 76). Both product families are supported: buyers who prefer deterministic wired topology choose project 76; buyers who prefer patent-faithful wireless density choose this card. The 13 QPHY line SKUs continue as-is.
Bracket contents 1× bicolor green/red status LED, 1× service USB-C port (unpopulated by default). No SFP cages. No optical cages. No copper data connectors.
Bracket hardware Custom single-slot HHHL bracket (BR1); cutout for LED + USB-C only; no cage cutouts. 2× mounting holes (MH1-MH2) per CEM 5.0 §3.4
Heatsink None. The CoolBeam thermoelectric pump on U1’s package top replaces the heatsink. Package top must remain free-air (unobstructed) for antenna radiation and pump venting.
Chip orientation U1 package top faces away from the motherboard (front side of card, near bracket edge) so the radiation pattern is unblocked
Line-of-sight requirement Intra-chassis neighbors’ cards must respect the antenna’s radiation pattern; package-top area above U1 must be unobstructed by any component, stiffener, or bracket element
Software stack Same C SDK, Python bindings, and Rust crate as project 76 (host driver does not distinguish cabled QPHY vs wireless QPHY-W; the difference is entirely below the driver’s abstraction line)
Physical layer QBeam — metallic package-top antenna structure carrying wireless chip-to-chip data using an order-preserving antenna series (PipeBeam)
Order preservation PipeBeam: per-element sequence latch + time-slot gating mechanism providing order-preserving delivery on the wireless channel
Classical throughput target Per-pair chip-to-chip design target consistent with the ExitPhi WFA silicon family; actual rate is a function of ambient RF environment, distance, and shielding
Quantum teleportation option On-die entanglement pool (patent §E) allows the same wireless channel to carry teleported qubits at 2 classical bits per qubit when deployment provisions a pre-distributed entanglement source
Range Intra-chassis (few cm) to intra-rack (
Link encryption AES link-layer classical crypto over the wireless channel (per FIPS PUB 197)
The QPHY PCIe Card embodies the ExitPhi patent’s quantum-photonic hybrid architecture , where a single chip package-top metallic structure performs three simultaneous functions:
Function Mechanism (per patent) Patent section
QBeam — wireless data transport Metallic package-top antenna structure carries wireless chip-to-chip data using an order-preserving antenna series and optional quantum-teleportation protocol atop the classical wireless channel §D–F
CoolBeam — thermoelectric cooling Same metallic top structure operated as the cold-side terminal of a vertical thermoelectric cooling pump. Shared physical structure with the antenna. Integrated on-chip; requires no host thermal accessory beyond standard slot airflow (200 LFM at 55 °C ambient sufficient) §D–F
PipeBeam — order-preserving delivery Per-element sequence latch + time-slot gating mechanism that provides order-preserving delivery on the wireless channel §C
The quantum teleportation option (patent §E) allows the wireless channel to carry teleported qubits at a rate of 2 classical bits per qubit. This requires a pre-distributed entanglement source provisioned at the deployment level. The on-die entanglement pool is built into every QPHY-W silicon variant.
U1 APM07-D-QPHY-W (reference; any APM04..APM12 QPHY-W variant drops in) FCBGA-196, 12 × 12 mm (patent §G) AutoPhi Modern Nexus DPU die + QBeam antenna + CoolBeam thermoelectric metallic top
The -W suffix marks the QPHY-W (wireless-form) package variant: same die as the corresponding APM-D-QPHY (project 76), packaged in FCBGA-196 per the patent instead of FCBGA-1024, with the metallic top structure implementing the antenna + thermoelectric pump per patent §D–F. Process node: 3 nm IFS 18A. Sample lead time from tape-out: 20 weeks; production 26 weeks.
Drop-in compatible QPHY-W silicon variants: APM04-D-QPHY-W, APM05-D-QPHY-W, APM06-D-QPHY-W, APM07-D-QPHY-W (reference), APM08-D-QPHY-W, APM09-D-QPHY-W, APM10-D-QPHY-W, APM11-D-QPHY-W, APM12-D-QPHY-W.
Power source Slot-only. No external power connector.
CoolBeam pump Integrated on-chip; no host thermal accessory needed beyond standard slot airflow (200 LFM at 55 °C ambient)
VCC_CORE 0.85 V 22 A / 30 A 2× TPS53681 (2-phase controller) U6-U7 U1 core supply — dedicated power plane L6
VCC_MAC 0.95 V 6 A / 9 A TPS53819A U8 U1 MAC / DMA engine
VCC_ANT 1.20 V 8 A / 14 A TPS53819A U9 U1 antenna analog + power amplifier + CoolBeam pump drive — dedicated power plane L7
Slot-power isolation: 2× CSD87381P ORing FETs (SON package).
Y2 — Rakon TCXO 25 MHz Flash + BMC + status ±2 ppm temperature-compensated crystal oscillator
12-layer FR-4 Tg170, halogen-free. Total thickness: 1.60 mm (±10%). Simpler than project 76’s cabled counterpart because there are no chip-to-chip differential-pair layers to reserve; PCIe is the only high-speed signal class on the card.
PCIe 5.0 diff pair F.Cu (L1) 5 mil / 5 mil / 5 mil 85 Ω differential Loose-coupled, GND1 (L2) reference
PCIe 5.0 diff pair (overflow) Sig_In1 (L3) 5 mil / 5 mil / 5 mil 85 Ω differential GND1+GND2 sandwich
No chip-to-chip differential-pair specification — chip-to-chip is wireless. Zero length-match rules for chip-to-chip channels (they do not exist on this card).
U1 1 APM07-D-QPHY-W [custom] FCBGA-196, 12×12 mm IFS 18A Nexus DPU die + QBeam antenna + CoolBeam thermoelectric top
Meaningfully cheaper than project 76’s cabled counterpart (~$93 excluding U1) because 4 SFF-8674 cages, 16 ESD arrays, and their support passives are eliminated. All commercial parts are dual-sourced except U1 and the Rakon clocks.
Package-top structure Passive heatsink Active phased-array antenna + thermoelectric cold-side (per patent)
Silicon family APM01-D-QPHY .. APM12-D-QPHY APM07-D-QPHY-W (wireless variant; APM04..APM12 W-variants drop in)
Routing complexity High (length-matched diff pairs to bracket connectors + chip-to-chip pairs) Low (PCIe 5.0 x16 to fingers only; no chip-to-chip pairs to route)
Items reused verbatim from project 76: host driver ABI, C/Python/Rust SDK, wire-protocol framing above the PHY, fabric-topology catalog.
CM Bring-Up Plan
- Power-only bring-up: all rails come up in sequence; no U1 populated yet.
- Boot-flash bring-up: load U1 boot ROM, apply PERST# release, verify UART banner on service USB-C.
- PCIe link-training: insert into a compliance host, verify Gen5 x16 at LTSSM L0.
- Antenna self-test: U1’s built-in antenna BIST radiates a test pattern and measures its own back-reflection (return-loss). Verify RL Chip-to-chip link: bring up two cards in the same chassis, run LINK_HELLO / LINK_ACK exchange, verify credit-based flow control.
- PCIe compliance: submit to PCI-SIG for Gen5 workshop.
- RF compliance: submit to certified test lab for FCC / ETSI emissions on the QBeam band.
Split-plane isolation (VCC_CORE / VCC_ANT on L6/L7) ≥ 20 mil. No signal crossings.
Er verification At 156.25 MHz (MAC clock) and at QBeam antenna carrier frequency on impedance coupons
What the CM does not need to route (because chip-to-chip is wireless): no length-matched 100 Ω differential pairs to bracket connectors, no PCB-level shielding for chip-to-chip channel, no via-back-drilling on chip-to-chip pairs (there are none). The card’s high-speed routing burden is limited to PCIe 5.0 x16 to the fingers. Layout complexity is significantly lower than a comparable cabled HBA of the same throughput.
76 Quantum PHY (cabled HBA line) Sibling product line; retains 13 SKUs; this card is the cable-free counterpart
USPTO Application 19/722,805 (ExitPhi, 30 claims, filed 2026-06-27, non-provisional utility, pro se) Canonical source for QBeam, CoolBeam, PipeBeam. This card is the patent-faithful PCIe embodiment.
Card mechanical / form factor Complete — PCIe 5.0 x16 HHHL, single-slot, no bracket cages Buyer/CM scope: mechanical fit test
QPHY-W silicon variant Referenced; die is project 76’s APM-D-QPHY; new FCBGA-196 package + antenna+CoolBeam metallic top Tape-out scope: mask update for the new package
- KiCad schematic capture for the card (SPEC + BOM + STACKUP are drafted to be sufficient for a one-pass capture without inventor involvement)
- PCB layout, Gerber generation, prototype fab, and bring-up
- QPHY-W silicon tape-out (variant of the existing APM-D-QPHY die + new FCBGA-196 package with antenna metal top)
- PCI-SIG PCIe 5.0 compliance workshop
- FCC / ETSI RF-emissions compliance filings (the wireless chip-to-chip band is subject to the same regulatory regime as the ExitPhi WFA family)
- Interop testing against ExitPhi WFA-Node / WFA-Hub / WFA-Mesh silicon
- Complete text of every file in the engineering package as delivered
- Worldwide, non-exclusive commercialization rights to make, use, and sell products built from the disclosed technologies
- Right to modify, extend, and derive works from the delivered materials
What does NOT convey (retained by the inventor):
- The underlying intellectual property: QBeam / CoolBeam / PipeBeam patent via ExitPhi (USPTO App# 19/722,805); all additional patents, copyrights, and trademarks including “QPHY”, “Quantum PHY”, “QBeam”, “CoolBeam”, “PipeBeam”, “ExitPhi”, “AeroPhi”, “AutoPhi”
- Right to prosecute, maintain, license to others, and enforce all retained IP
- Right to grant additional non-exclusive licenses to third parties
This is not a patent license and not a patent assignment. Available only to companies incorporated, headquartered, and primarily operating in the United States. USD only. All payments final, non-refundable. Governing law: State of Georgia, USA; venue: Gwinnett County. The buyer’s payment obligation survives bankruptcy (not subject to discharge or restructuring). Communication by email and postal mail only.
USD $3,000,000,000 per card. Included at no extra charge inside All In One (20T) . Positions above APM12-D-QPHY silicon-only ($2B, project 76) because this is a finished card SKU with integrated antenna+cooling silicon variant.
SPEC.md Top-level technical specification: scope, system context, physical/mechanical, silicon, host interface, wireless data path, power, deliverables, deferred items
MANIFEST.json Machine-readable project catalog: positioning, store product metadata, filed IP dependencies, sibling portfolio projects, firewall policy, differentiators, hardware families, silicon variants, license terms
STATUS.md Subsystem-level status tracker: concept, patent alignment, form factor, BOM, stackup, QPHY-W silicon, driver/SDK reuse, wire protocol reuse, and downstream handoff items
LICENSE.md License terms: what conveys (documentation + worldwide commercialization rights) and what is retained (patents, underlying IP, prosecution/enforcement rights)
PRODUCT_BRIEF.md One-page product brief: problem statement, invention summary, card-at-a-glance specs, maturity report, pricing
STORE_LISTING.md Store product page source copy: kicker, title, subtitle, lead paragraph, stat strip, feature descriptions, comparison table, buyer deliverables, terms
CONTACT_INFO.txt Licensor contact details: name, address, email, store URLs, sibling product links
qphy_pcie_card_store_description.html Rendered HTML for the live product page at cri-one.com/store/qphy-pcie-card.html
hardware/CARD/SPEC.md Card-level board reference: mechanical dimensions, silicon placement, power rails with voltages/currents/regulators, clock architecture, CM routing notes, bring-up plan, DFM constraints
hardware/CARD/BOM.md Full bill of materials: 12 active ICs (U1–U12), ~250 passives (capacitors, ferrites, resistors, ORing FETs), 2 clocks, LED, connectors, bracket, with vendors, packages, and approximate costs
hardware/CARD/STACKUP.md 12-layer PCB stackup: layer-by-layer copper weights, dielectric thicknesses, Er values, impedance targets, length-match tolerances, via structure, manufacturing class (IPC-6012 Class 6, ENIG, UL 94V-0)
figures/qphy_pcie_card_art.py Python (PIL/Pillow) script generating the 500×~590 px hero product image: cable-free card with package-top antenna radiating wireless arcs, no bracket cages, bicolor LED, service USB-C
- Project 76 RTL, host driver contract, C/Python/Rust SDK, wire-protocol framing, fabric topology catalog, and 12-generation FOUNDRY_HANDOFF
- Project 54 full ExitPhi patent text
- Deployment playbook (chip-to-chip line-of-sight considerations, rack layout notes)
Delivery: Shipped on a Blu-ray disc, AES-256 encrypted, via tracked post.
Photo
Footnotes
- Product number 8527.
- Family: qbeam.
- Purchase: When you buy, you buy the use of that blueprint only.