PhantasmPhi CPU Phase II - PHC10a - one 7 nm QIC die (single chiplet) - 1.40 E-OPS (guaranteed 1 P-OPS)

$350,000,000,000.00
In stock
SKU
phantasmphi-cpu-phase2-phc10a_pf1
PhantasmPhi PHC10a: one QIC die on its package; three strands of light rise through its layers while QBeam sends and receives, animated picture

One 858 mm² QIC die, 1,500 CFET layers, three strands + QBeam s/r — 1.40 exa probability-OPS, 1,395× its guaranteed 1 P-OPS floor; 1,400 logical qubits. 93 W net.

A chip should be something you can hold in one hand and reason about in one sitting. PHC10a is the smallest rung of PhantasmPhi CPU Phase II: one 7 nm QIC-105 die, a single chiplet, 858 mm² full-reticle, 1,500 CFET layers, sized for a single rack. It carries the three strands, photon, electron and atomic, and has QBeam send and receive on the package. QBeam is a wireless send-and-receive chain, a Bell-measure transmit, two classical bits over the CoolBeam phased array and an I/X/Y/Z correction at the receiver; it moves bytes and never does the computing.

The computing is the credited chain: iverilog-verified RTL at 0.004625 depositions per clock, 4.9 ops per deposition, 786.7 MHz measured at 7 nm, the ×10 Color-ISA pin, three strands and a 99.998% QEC gate. One die comes to 1.40 exa probability-OPS, 1,395 times its guaranteed floor of 1 P-OPS, with 1,400 logical qubits, at 93 W net after 42% LED power recycling. The floor is what is guaranteed; the credited chain is what is delivered. The native unit is probability-OPS; the 1 PFLOPS label is the equivalent framing. QBeam rates are design targets until tape-out, interconnect only.

This is the entry point for an engineering buyer or datacenter operator starting at one rack. A US company walks away with the source-licensed RTL plus photonic-HDL zip, the 17-section LICENSE, the Licensed-IP schedule and the PHC01 SKY130 tape-out anchor evidence, delivered after a countersigned NDA and wire settlement. You buy the use of the blueprint; the invention stays with CRI-ONE.

Description

Phase II of PhantasmPhi CPU — PhantasmPhi CPU Phase II - PHC10a - single-rack - 1 PFLOPS. Non-exclusive source-licensed RTL + photonic-HDL zip (full 17-section LICENSE, Licensed-IP schedule, PHC01 SKY130 tape-out anchor evidence). Delivered after countersigned NDA + wire settlement. USA companies only, USD only, email + postal mail only.

One 858 mm² QIC die, 1,500 CFET layers, three strands + QBeam s/r — 1.40 exa probability-OPS, 1,395× its guaranteed 1 P-OPS floor; 1,400 logical qubits. 93 W net.

The part is QIC-105: an 858 mm² full-reticle die in the real 40×40 mm BGA-1536 die-side package, 18-chiplet stack × 1,500 CFET layers = 27,000 voxel-layers, with QBeam SEND and RECEIVE integrated on-package (ExitPhi, USPTO App 19/722,805): Bell-measure transmit → 2 classical bits over the CoolBeam phased array → I/X/Y/Z receive correction; 4-lane chain + PipeBeam ordering + 48-channel nanophotonic transceive. QBeam carries bytes, never compute OPS.

Credited chain (unchanged receipts): 0.004625 depositions/clock (iverilog-verified RTL) × 4.9 ops/deposition × 786.7 MHz measured at 7 nm / 2.75 GHz at 2 nm (#5 EM Cooling, Pat 1096-1098) × ×10 Color-ISA pin (#8) × ×3 photon/electron/atomic strands × 99.998% QEC gate (#4); power net of #1 LED Power Recycling (42%).

The decade/3× figure is the guaranteed floor; the delivered figure is the credited chain on the QIC-105 part. Native unit is probability-OPS (bronze); FLOPS-equivalents are GOLD framing, labeled. QBeam rates are design targets until tape-out and are quoted as interconnect only. Settles by wire or online check.

Photo

"Phantom Computing CPU": copper-heatsinked CPU module labelled 'PHANTOM COMPUTING - CPU / 16th GEN CORE' on a board in a lab, with a 'PHANTOM PCIe Gen8 Lab' desk plaque

Footnotes

  1. Product number 10363.
  2. Family: phantasmphi.
  3. Purchase: When you buy, you buy the use of that blueprint only.
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