77-qphy-pcie-card

Status: Foundry-ready (L4). Full SPEC + BOM + 12-layer STACKUP on file. Physical-design flow output present. QBeam is a filed non-provisional USPTO utility patent. Patent alignment verified against ExitPhi patent text. Host driver ABI, C/Python/Rust SDK, and wire-protocol framing reused verbatim from project 76. KiCad schematic capture, PCB layout, prototype fab, PCIe 5.0 compliance, FCC/ETSI RF-emissions compliance, and QPHY-W silicon tape-out are buyer/CM/cert-lab scope.

QPHY PCIe Card is a PCIe 5.0 x16 half-height half-length (HHHL) add-in card that hosts a single QBeam-enabled chip on-board. It is the patent-canonical PCIe form factor for the ExitPhi wireless datacenter fabric invention (USPTO App# 19/722,805). The chip’s FCBGA package-top metallic structure serves simultaneously as the RF phased-array antenna for wireless chip-to-chip data and as the cold-side terminal array of a vertical thermoelectric cooling pump (CoolBeam).

There are zero data cables on the bracket. The bracket carries only a bicolor status LED and a service-only USB-C port (unpopulated by default per the patent’s “service-port physical attachment used solely during manufacturing” clause). PCIe fingers carry only host-to-chip control and DMA traffic. All chip-to-chip communication travels wirelessly through the package-top antenna to peer QBeam chips in nearby cards, chassis, or racks. This card is faithful to the ExitPhi patent which specifies that “the only persistent physical attachment to a chip or to a rack-unit so equipped is an electrical power conductor.”

The card sits alongside — not inside — the Quantum PHY 13-SKU cabled HBA product line (project 76). Both product families are supported: buyers who prefer deterministic wired topology choose project 76; buyers who prefer patent-faithful wireless density choose this card. The 13 QPHY line SKUs continue as-is.

The QPHY PCIe Card embodies the ExitPhi patent’s quantum-photonic hybrid architecture, where a single chip package-top metallic structure performs three simultaneous functions:

The quantum teleportation option (patent §E) allows the wireless channel to carry teleported qubits at a rate of 2 classical bits per qubit. This requires a pre-distributed entanglement source provisioned at the deployment level. The on-die entanglement pool is built into every QPHY-W silicon variant.

The -W suffix marks the QPHY-W (wireless-form) package variant: same die as the corresponding APM-D-QPHY (project 76), packaged in FCBGA-196 per the patent instead of FCBGA-1024, with the metallic top structure implementing the antenna + thermoelectric pump per patent §D–F. Process node: 3 nm IFS 18A. Sample lead time from tape-out: 20 weeks; production 26 weeks.

Drop-in compatible QPHY-W silicon variants: APM04-D-QPHY-W, APM05-D-QPHY-W, APM06-D-QPHY-W, APM07-D-QPHY-W (reference), APM08-D-QPHY-W, APM09-D-QPHY-W, APM10-D-QPHY-W, APM11-D-QPHY-W, APM12-D-QPHY-W.

Slot-power isolation: 2× CSD87381P ORing FETs (SON package).

12-layer FR-4 Tg170, halogen-free. Total thickness: 1.60 mm (±10%). Simpler than project 76’s cabled counterpart because there are no chip-to-chip differential-pair layers to reserve; PCIe is the only high-speed signal class on the card.

No chip-to-chip differential-pair specification — chip-to-chip is wireless. Zero length-match rules for chip-to-chip channels (they do not exist on this card).

Meaningfully cheaper than project 76’s cabled counterpart (~$93 excluding U1) because 4 SFF-8674 cages, 16 ESD arrays, and their support passives are eliminated. All commercial parts are dual-sourced except U1 and the Rakon clocks.

Items reused verbatim from project 76: host driver ABI, C/Python/Rust SDK, wire-protocol framing above the PHY, fabric-topology catalog.

What the CM does not need to route (because chip-to-chip is wireless): no length-matched 100 Ω differential pairs to bracket connectors, no PCB-level shielding for chip-to-chip channel, no via-back-drilling on chip-to-chip pairs (there are none). The card’s high-speed routing burden is limited to PCIe 5.0 x16 to the fingers. Layout complexity is significantly lower than a comparable cabled HBA of the same throughput.

This is not a patent license and not a patent assignment. Available only to companies incorporated, headquartered, and primarily operating in the United States. USD only. All payments final, non-refundable. Governing law: State of Georgia, USA; venue: Gwinnett County. The buyer’s payment obligation survives bankruptcy (not subject to discharge or restructuring). Communication by email and postal mail only.

USD $3,000,000,000 per card. Included at no extra charge inside All In One (20T). Positions above APM12-D-QPHY silicon-only ($2B, project 76) because this is a finished card SKU with integrated antenna+cooling silicon variant.

Delivery: Shipped on a Blu-ray disc, AES-256 encrypted, via tracked post.