AutoPhi PCIe 5.0 1536 – Gift raiser
Three pledge points
From the realistic clearing band already published on the product page. Pick what matches what the engineering package is worth to you. A custom amount is also fine.
Research pledge
Single-buyer evaluation. You receive the engineering package on AES-256 Blu-ray when first silicon ships, non-exclusive, for your own research and evaluation.
- Complete KiCad PCB + schematics
- Netlists + flat BOM
- Specctra routing pair
- 1,536-ball pinmap
- 33-script Python pipeline
Strategic pledge
Mid-strategic non-exclusive. Everything in the research pledge, plus two things: a direct line to the inventor and priority on build-cycle updates as first silicon approaches.
- Everything in the research pledge
- Direct email line to the inventor
- Priority build-cycle updates
Deployment pledge
Strategic non-exclusive, with manufacturing and deployment rights. You receive the Blu-ray and the right to manufacture, deploy and operate boards built against it, in any volume, worldwide. Non-exclusive – the inventor retains the right to grant the same terms to others.
- Everything in the strategic pledge
- Manufacturing + deployment rights, non-exclusive
- First-call on build-cycle technical questions
What your gift builds
Every pledge funds the real tape-out. The build target is Intel Foundry – the AutoPhi 18-chiplet voxel stack maps directly onto Intel Foveros Direct 3D hybrid bonding, the single commercial packaging line that matches the architecture as drawn. US siting opens the full CHIPS Act stack on top of each pledge: 25% Investment Tax Credit, DoE Loan Programs Office Section 1703 guarantees, DARPA ERI and NSTC Microelectronics Commons grants – stacked, these can double the effective reach of each dollar pledged here.
Chip at Intel Foundry
| Node | Analog to | Total NRE | Wafer | Good dies / wafer | Per-die silicon | 25-wafer lot |
|---|---|---|---|---|---|---|
| Intel 7 | TSMC N7 | $22-35M | ~$9K | ~35 | ~$260 | ~$225K |
| Intel 3 | TSMC N3 (EUV) | $45-65M | ~$16K | ~28 | ~$570 | ~$400K |
| Intel 18A | TSMC N2 (GAA + PowerVia) | $65-115M | ~$22K | ~20 | ~$1,100 | ~$550K |
The carrier board
12-layer PCIe Gen 5 add-in card, 256.625 × 111.95 mm, Megtron 6 low-loss laminate, controlled impedance on PCIe, QSFP28 SerDes and DDR3 byte lanes. 525 real components placed, 8,388 track segments, 1,997 vias in the current working file. Prototype 10 cards: $250-380K. First production run of 1,000 cards: $2-3.5M.
Collateral behind the gift
| Asset | Status | Anchor |
|---|---|---|
| AutoPhi IP, umbrella patent | Patent pending | USPTO 19/835,210 (umbrella CIP, October 2026) |
| AutoPhi QBeam on-package | Patent pending | USPTO 19/722,805 (ExitPhi App) |
| AutoPhi BGA-1536 package program | Owned, non-exclusive license model | Inventor retains IP, package program, routing pipeline |
| Engineering data package | Complete, under revision toward first silicon | KiCad PCB + schematics + netlists + flat BOM + Specctra pair + 1,536-ball pinmap + 33-script Python pipeline, AES-256 Blu-ray |
| Live asset valuation | Published | $7,000,000,000 at cri-one.com/44-autophi-pcie5-1536.html |
Pledge
No third-party trackers on this page. The pledge goes straight to the inventor's inbox and is not shared.
Listed prices exclude any applicable sales tax; Stripe adds the correct state and local rate at checkout where required by law. Enterprise B2B orders (RIDDLE contracts, QBeam SKUs) settle by wire under a signed PO and are quoted net of tax unless a resale certificate is on file.