99-normal-resonance
A drop-in functional-safety block for any chip: it senses temperature, holds the chip inside its safe band, fails safe at the limit by cutting power in a controlled way, reports its state truthfully, and lets a person power it down and lift it out by hand. Verilog block plus firmware; verified in simulation (31/31 and 12/12 checks pass). Sold as a perpetual, non-exclusive blueprint license. US App 19/829,894 patent pending.
It's an understanding of the nature of things: we need normal temperatures, and not just temperatures, because normal is a metaphor for how anything lasts. A hand can only hold what is warm like a hand, and a chip that has to live in the cold can never be reached. So this block goes inside the chip itself, where it quietly keeps the silicon at 30 degrees Celsius, about the warmth of the palm that will one day lift it out. A small Peltier nano-magnetic cooler does the work, and when the chip is already normal it does no work at all; the effort only rises as far as the user's job demands. There are no heat sinks, just a small protector that cuts the power if anything ever goes wrong. When it is time for service, the block powers the chip down, checks it is comfortable to touch, and lights a little remove-OK lamp. Once it is embedded, normal is no longer a promise in a manual. It is implied.
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Description
More Information
Patent pending. This product's Normal-Resonance Substrate (NRS-1) operation is the subject of US Patent Application 19/829,894 (filed 2026-10-05 at the United States Patent and Trademark Office; Christopher Gabriel Brown, sole inventor, pro se). The blueprint license delivered with this product is separate from the patent application; see LICENSE.md in the delivery zip for the license terms.
Normal Functional Safety — the operation
A self-contained functional-safety block for a chip. It is the safety operation only: sense, classify, hold, fail safe, and allow safe service. All temperatures are signed tenths of a degree Celsius.
1. Sense die and surface temperature, continuously. 2. Classify one honest state on the register bus: NORMAL, COOL, WARM, or OUT OF RANGE. 3. Hold the safe reference; cooler effort is zero when already safe and is bounded to a maximum. 4. Fail safe: a thermal protector cuts core power at once at the limit, and keeps it cut until the chip is safe again.
Guarantees
- Truthful state — never reports safe when it is not.
- Bounded effort — zero at the reference, never above maximum.
- Fail safe — the protector cut-off is enforced in hardware and overrides firmware and registers.
- No unsafe target — any working target outside 20–40 °C is refused.
- Safe service — "safe to remove" only when powered down and inside the hand-removal window.
- Safe default — on reset it powers up at the safe reference; on a lost reading it does not report safe.
What ships
Verilog safety monitor and embeddable block with testbenches (31/31 and 12/12 simulation checks pass, Icarus Verilog), C firmware driver, the functional-safety operation specification, and the blueprint license.
Honest scope
Simulation only; no silicon or board yet. C firmware is written but not compiled. Limits are cri-one version-1 values, not an external certification (e.g. IEC 61508 / ISO 26262); the buyer is responsible for any certification. US organizations; USD.
Economy of effort, and the cooling
Holding normal is designed to cost as little as possible. Effort here is a ratio set by the user: at the safe reference the cooler does no work at all, and it only spends effort in proportion to how hard the user's own workload pushes the chip away from normal. A light load costs almost nothing; a heavy load spends only as much as that load demands, and no more. That is what efficiency means on this block — the least effort needed to keep the chip within its limits, never surplus, never energy from nothing.
The cooling is electromagnetic Peltier (nano-magnetic) cooling. It holds the die at 30.0 °C and can warm as well as cool, driven only to the level the control loop calls for. There are no heat sinks; a small thermal protector cuts power in a controlled way if a limit is ever reached. The same control-and-CMOS loop that answers the user's demand is what keeps the effort economical: demand in, just-enough cooling out, the chip kept normal.
Why this function is the second-most-important on the chip
The most important thing an AutoPhi-family chip does is its work — the computation and the power it exists to deliver. Keeping it normal and safe is second, because nothing the chip does can run, be trusted, be serviced, or survive if it leaves its limits or misreports its state. The work is first; staying normal is the condition that lets the first happen and keep happening. The fail-safe cut-off is enforced in hardware, so no software fault can override it.
Intellectual property
This functional-safety operation is one piece of a single, wholly-owned body of work by Christopher Gabriel Brown (cri-one): a master register of 1,752 numbered inventive depositions, copyrighted 2017–2020 (ISBN 978-1658972871), across more than 100 project folders. None of it has been sold or assigned; all of it is retained by the inventor. What is sold here is a blueprint license to the functional-safety operation only; the copyrights and the underlying register stay with the inventor.
AutoPhi patent-pending relationship
This function is designed to live inside AutoPhi-family chips, which are the subject of the inventor's patent-pending work — U.S. Application 18/370,908 (AutoPhi: quantum-battery integration and electromagnetic-propulsion IC), with related quantum-battery application 19/403,339, pro se, no assignment of record. It is related to and built for that platform; it is not a grant of, and not a claim of coverage under, those patents. A buyer intending to practice AutoPhi-family technology must verify scope against the filings and license that work separately. Patent-pending status is a filing, not a grant; claims may change during prosecution.
On the name
anta (Latin) is a pilaster or squared doorpost — the frame a thing is set into and lifted out from, which is the socket in this design. anto is not a classical Latin word on its own; the nearest true form is ante, “before, in front of.”
ph·anta·sm — what a phantasm and a PHY are
ph · anta · sm. Spelled out, the word phantasm carries anta at its center — the Latin doorpost from the note above, the frame a thing passes through. That is word-play rather than etymology, and it fits: a phantasm is something that passes from the unseen into view.
Phantasm. From the Greek phantasma, “an appearance, an image,” from phantazein, “to make visible,” and phainein, “to show.” In cri-one’s work the name belongs to the PhantasmPhi line: the phantasm math engine is a coprocessor that sits beside the CPU and “answers the math,” making a result appear that the main processor did not compute itself.
PHY. Short for physical layer — the lowest layer of any link, the circuitry that turns a chip’s digital ones and zeros into real signals on a wire, a beam of light, or a radio wave, and back again. Every PCIe lane, network port and optical link has a PHY. In cri-one’s work the QPHY is the quantum/photonic physical layer of the QBeam family. The functional-safety block on this page keeps those physical layers inside their safe temperature, so the signals they carry stay true.
Footnotes
- Product number 10340.
- Family: resonance.
- Purchase: When you buy, you buy the use of that blueprint only.