18-autophi-future

$2,947,162,500.00
In stock
SKU
2046
AutoPhi Future: a photon lands on the seed voxel, copies tile outward as a segment, then stack and volume, animated picture

Asset valuation: $3,000,000,000. Master index of all projects: PROJECTSINDEX. 19-autophi-miracle. Re-engineered AutoPhi Future: voxel-as-cell, photon chromosomes, one seed many harvests, Blu-ray foundry packages. Same vision as 18; one project, one path, everything good that 18 could have been. The

Think of a tree made of metal that computes. No water, no leaves. It draws in light, turns it into electricity, and data flows through its trunk. That is AutoPhi Future - a structure, not a metaphor. The die is built from voxels the way a tree is built from cells: eight kinds that take in light, send, store, cool with no moving parts, or compute in light, charge and quantum state. Each voxel carries a chromosome written in light - wavelength is the instruction, polarisation the operand, path the address, intensity the magnitude - and one photon starts the cycle.

The product is not the chip. It is a ratio. You supply the envelope and the process node; the repository gives back calculation and performance per exchange - per watt, per area, per unit of cost. The formulas are in the open; the ability to grow seeds from the ratio is in the repository. One seed, many harvests: same seed, same inputs, same result, tiled and stacked across a chip series from entry part to datacenter peak to all-in-one at volume, for TSMC, Samsung, Intel, SkyWater and GlobalFoundries.

This is the roadmap vessel for the AutoPhi stack, Project 19 folded in: one number, one reality. It is for chip-design teams, foundry partners and datacenter buyers who want the next generation drawn before they fund it. Two USPTO applications are pending; the inventor, Christopher Gabriel Brown, keeps the IP, and the buyer walks away with the seed, the ratio and the repository grown from them.

Description

18-autophi-future — AutoPhi Future
Inventor: Christopher Gabriel Brown

USPTO Application No. 18/370,908 — AutoPhi: Quantum battery integration & electromagnetic propulsion IC (filed 2023-09-21; pending)

USPTO Application No. 19/540,453 — Integrated Technology Portfolio (umbrella) (filed 2026-02-13; pending)

Maturity level: 4 — Tape-out / Mass-Manufacturable
SKU: 2046
Patent portfolio reference: PATENT_PORTFOLIO.md; filing receipts: N417_FILING_RECEIPTS.md

Additional patent lineage (from deposition catalog): Patents 3561, 2876, 1026, 3559 (LED recycle-powered system); Patents 1096, 1097, 1098 (electromagnetic cooling system); 1,752+ previously filed patents referenced across the portfolio; patent pending 2012–2025.

Overview

18-autophi-future is the Future concept and roadmap repository for the AutoPhi stack. It is one vessel : Project 19 (AutoPhi Miracle) has been merged into Project 18, so 18 is no longer only the original concept — 18 is the concept plus everything that 19 became. One number. One reality.

The mission is to find the right ratio in voxel-to-nm dimensions — how the voxel scales with process, how much function per area at each node. One seed, many harvests; down in scale, up in performance. The ratio is what is discovered, chosen, and sold.

The product is not the chip as object. The product is the ratio of instruction set (from size) to calculation and performance per exchange . You supply envelope and node (size); you get calculation (FLOPS) and performance per exchange (per dollar, per watt, per area). The formulas are in the open. The ability to build seeds from the ratio is in the repository.

AutoPhi Future extends the stack; it does not replace the present. It provides a consistent vocabulary, a single canonical shape, and a direction: another generation in which photons and electrons work together in a computational fashion.

The Metal Tree: Structure, Not Metaphor

AutoPhi Future posits a metal tree that computes . No water. No biological leaves. What flows through it is data — not oxygen. What it draws in is light ; what it turns that light into is electricity to function .

Tree Role (Metal) Function Chip Analogue (Voxel Role)

Intake / Roots Bring in light, anchor structure Energy intake — optical/power input; voxels that receive light and feed the rest

Trunk / Vascular Send flow SEND — data, control, quantum state, power along waveguides and wires

Light → Energy Capture light, make electricity ENERGY — voxels that convert light energy emission to electricity; no real leaves

Cool + Support Cool others, help both COOL_SUPPORT — EM cooling, thermal interface, decap, structure

Eight voxel types serve as the species of this tree:

  • INTERCONNECT — data transport, routing
  • LIGHT — waveguide, router, light-to-electricity conversion
  • BLANK — decap, thermal fill, footprint placeholder
  • HYBRID — combined light + quantum + classical compute
  • QUANTUM — qubit-based quantum compute
  • IO — power/light/signal input-output
  • MEMORY — storage
  • CROSS — cross-connect, diagonal routing

The Photon Chromosome and Three Strands

The voxel is the cell of the die. For efficiency it receives a DNA-style encoding: a compact, replicable chromosome that specifies how it calculates and processes. Three strands, one trigger:

Strand Carrier Encodes Role
Photon Light (λ, pol, path, I) → opcode, address, operand Initiation + optical compute
Electron Charge (opcode, operands, result) Classical compute
Atomic Qubit (gate, mask, phase, ctrl) Quantum compute
The photon chromosome maps four physical quantities to computation:
Physical Quantity Symbol Computational Mapping
Wavelength (colour) λ Opcode — Red = ADD, Blue = SUB, Green = MUL, Yellow = DIV
Polarisation pol Operand index, qubit index, or phase
Path path Address — which voxel, which port, which waveguide
Intensity I Magnitude — operand value, photon count or amplitude

The light trigger (single-photon computation initiation) is the start of the cell cycle: one photon initiates the process.

The Seed: One Definition, Many Harvests

The seed is the minimal, canonical specification from which every build is grown. It is not a single file; it is the canonical set :

Part of the Seed What It Defines File Reference

Tiers + COGS Chip series: Entry → Peak → Volume; CPU/GPU/DPU/all-in-one; COGS bands chip_series_cpu_gpu_dpu.yaml

Voxel Roles Tree roles: SEND, ENERGY, COOL_SUPPORT; voxel types VOXEL_PLANT_CHIP_LIGHT_FORM.md

Photon Chromosome Form in light: (λ, pol, path, I) = opcode, operand, address, magnitude VOXEL_CELL_DNA_AND_PHOTON_CHROMOSOMES.md

Nine Elements LED recycling, vertical threading, nanophotonic, QEC, cooling, battery, hybrid, neuromorphic NINE_TECHNOLOGIES (27/28)

Performance + COGS One-page metrics and decisive COGS (AES, $5K–$20K paths) PERFORMANCE_AND_COGS_SUMMARY.md

Reproducibility: Same seed, same inputs, same result. Version the seed; version the chips. The seed defines the unit; scaling is by repeating and tiling it — segment, stack, volume.

Supported foundries: TSMC, Samsung, Intel, SkyWater, GlobalFoundries.

Nine Technology Elements
# Technology Specification

1 LED Power Recycling 90% efficiency; 42% net power reduction; 85% energy recycling; zero net power; continuous operation

2 Vertical Threading 12,000 TSVs/mm²; 125 TB/s bandwidth
3 Chiplet Stacking 500 layers; 18 per stack; ultra-thin die ~0.0875 mm/layer

4 Nanophotonic Data Flow 1,400 TB/s; 2,800 optical channels; silicon photonic waveguides; sub-ns latency; 1,000× power efficiency

5 Quantum Error Correction 99.998% fidelity; 1,400 logical qubits; surface code implementation

6 Electromagnetic Cooling 97% efficiency; 32 thermal zones; zero-moving-parts; magnetic heat transfer; quantum coherence optimisation

7 Quantum Battery Layers 20 layers; 1,500 Wh capacity; 75 MW burst
8 Quantum–Classical Hybrid Seamless integration; real-time control and readout electronics

9 Neuromorphic AI Engine Event-driven; 1M+ artificial neurons; spiking neural network (STDP); 1,000× power efficiency

Chip Series: Tiers and the Arc

The chip series describes an arc: low COGS rising to expensive, then returning. Every tier is modelled along four axes: CPU , GPU , DPU , and all-in-one . The cost is named AES (Latin aes = bronze) — actual, tangible, real price to function.

Tier Name COGS Band CPU GPU DPU All-in-One Notes
1 Entry Low Primary — — No Single die, control only
2 Mid Low–Mid Yes Small — No CPU + small GPU; edge/client
3 Pro Mid Yes Full Optional No Workstation / server
4 Peak Expensive Yes Max Full No Multi-die or large die; datacenter
5 Unified Mid Yes Yes Yes Yes Single die CPU+GPU+DPU; 28 complete unit
6 Volume Low Yes Yes Yes Yes Same all-in-one at volume; COGS back down
Performance Metrics
Metric Bottom (Entry/Mid) Top (Peak/Unified)
Clock 100–200 MHz → 2–4 GHz 4–8 GHz
Throughput vs 130 nm 3–5× 5–10×
Power vs 130 nm 50–70% reduction 70–80% reduction
Qubits 64–128 128+
Fidelity 95–98% 98–99%+
Compute CPU + small GPU Full CPU + GPU + DPU (all-in-one)
Use Edge, client, proof Server, datacenter, complete unit
System-Level Performance (AQCHS / REV_H)
Metric AQCHS (System) REV_H (800× Scaled Card)
TOPS (AI) 32,768+ —
Peak FLOPS — 2.8 ZettaFLOPS
Memory — 5 PB
Memory Bandwidth 150 TB/s (photonic) 360 PB/s
Qubits 4,096 (superconducting, Josephson junction, 99.9% fidelity) 9.83M
Neurons (neuromorphic) 1M+ (spiking, STDP) 3.2B
Optical Channels 1,000+ 4.8M
Power System-level 280 kW
Form Factor (REV_H) — 268 mm × 111 mm × 70 mm (fits 2U+)
3D Stacking — 800 layers; 2,400 dies integrated

142 Synthesised IC Designs Complete portfolio; custom IP cores (no ARM); production netlists

Comparative Context (For Reference Only)

Dimension AutoPhi (System or Top Package) Best-in-Class Other (Single Part) Approximate Ratio

TOPS 32,768+ (system) ~4,000 (H100) ~8×
Peak FLOPS 2.8 ZF (REV_H card) ~990 TF (H100) ~2,800×
Interconnect BW 150 TB/s (photonic, AQCHS) ~3.9 TB/s (H100 HBM) ~38×

Note: System vs single chip comparison; different product classes. Provided for context only.

Decisive COGS and AES Paths
Path AES COGS Volume Process Node Die Count Timeline
Near-term $20,000 1B units/year 3 nm 240 dies 5–10 years
Long-term $5,000 10B units/year 1 nm 12 monolithic dies 10–15 years

Cost optimisation levers (REV_H): Volume (1B–10B units → 10,000–100,000× cost collapse), process node (14 nm → 3 nm/1 nm → 8–24× die cost reduction), architecture (2,400 dies → 240 or 12 monolithic → 10–200× die count reduction), full/zero-touch automation ($0–$3K package and test), integration (cooling/power/PCB integrated or eliminated → $50M+ other costs to $0).

Seed Matrix: Formulas in the Open

The seed matrix provides a formula table to build seeds from the ratio.

Input / Output
Inputs (You Supply) Outputs (Computed)

scenario_id, node_nm, H_mm, W_mm, a_v_mm2, f_v_flops, power_w, aes_usd S_mm2, N_v (voxel count), C_flops (total calculation), rho_flops_per_mm2, P_per_dollar, P_per_watt

Formulas
From (Inputs) To (Output) Formula
H, W S (envelope area) S = H × W
S, a_v(n) N_v (voxel count) N_v = S / a_v(n)
N_v, f_v C (total calculation) C = N_v × f_v
C, S ρ (density) ρ = C / S
C, AES P_per_dollar P$ = C / AES
C, P_w P_per_watt Pw = C / P_w
Example Scenario (130 nm)
Parameter Value
Node 130 nm
Envelope (H × W) 20 mm × 20 mm
Area per voxel (a_v) 0.31 mm² (560 × 560 μm)

FLOPS per voxel (f_v) 1 × 10&sup9;

Power 400 W
AES (cost) $20,000
S (area) 400 mm²
N_v (voxels) 1,290
C (total FLOPS) 1.29 × 10¹²

ρ (FLOPS/mm²) 3.225 × 10&sup9;

P_per_dollar 6.45 × 10&sup7;

P_per_watt 3.225 × 10&sup9;

Executable Seeds and OpenLANE2 Flow

The seed has a declarative part (YAML, docs, the canonical set) and an executable part. The executable seed is one or more voxels built through OpenLANE2 to GDSII and LEF.

Seed Voxel RTL: autophi_voxel_blank
Parameter Value
Module name autophi_voxel_blank
QUBITS parameter 256
CLASSICAL_BITS parameter 32
SECURITY_LEVEL parameter 3
Timescale 1 ns / 1 ps

Ports: light_trigger, light_wavelength[7:0], light_intensity[7:0], laser_red[7:0], laser_blue[7:0], laser_green[7:0], laser_yellow[7:0], qinst_opcode[7:0], qinst_qubit_mask[QUBITS-1:0], qinst_classical[CLASSICAL_BITS-1:0], color_result[7:0], operation_mode[1:0], light_computation_complete, quantum_state[QUBITS-1:0], quantum_fidelity[7:0], hybrid_computation_complete, total_operations[31:0], clk, rst_n.

OpenLANE2 Configuration

Parameter Value
DESIGN_NAME autophi_voxel_blank
CLOCK_PORT clk
CLOCK_PERIOD 10 ns
DIE_AREA [0, 0, 560, 560] (560 × 560 μm)
PL_TARGET_DENSITY_PCT 45
PDK (default) SkyWater 130 nm (sky130) via volare
Growth targets 5 nm, 3 nm, 1 nm (with foundry PDK)

Seed run outputs: GDSII (.gds), LEF (.lef), netlist, DEF — stored in seeds/ and copied into every build as Seeds/ . Completed OpenLANE2 runs with GDS/LEF artefacts are present in the repository (run date 2026-02-07).

Blu-ray Harvest: 25 GB Distributable Build

Every build is written to a 25 GB Blu-ray single-layer disc. The build script ( build_bluray_foundry.bat / .py ) packages:

  • Foundry handoff packages (from Project 24 — TSMC, Samsung, Intel, SkyWater, GlobalFoundries, or all-foundries)
  • Performance and decisive COGS documentation
  • Seeds/ folder (GDSII/LEF from OpenLANE2 seed runs, when present)
  • MANIFEST.txt and DISC_README.txt

The disc is distributable and resellable under terms set by the inventor. The build also works with the whole 18 project folder ( 24_bluray_test ).

Quantum and How Chips Are Made

Quantum: The vision includes quantum (QUANTUM voxel type, whole-quantum options, hybrid, nine elements). The seed built today is classical : one cell, built with OpenLANE2 (synthesis + place-and-route). No qubits in that block. Quantum is the path available when the right voxel types and RTL are added (in Projects 27/28 and beyond).

How chips are made: RTL (from 27/24/28) → Synthesis (Yosys) → OpenLANE2 P&R (OpenROAD) → GDSII/LEF → Foundry or package. Project 18 provides the seed voxel build, the ratio and seed matrix, and the Blu-ray packaging. Projects 24/27/28 provide full RTL and build flows for bigger dies and systems.

Whole-quantum options (from VOXEL_PATHS_AND_WHOLE_QUANTUM_OPTIONS):

  • Unified state representation (global state spanning all quantum voxels)
  • Global Hamiltonian or circuit (one evolution over all qubits)
  • Hierarchical / reduced model (effective qubit per voxel or cluster)
  • Classical–quantum boundary interface (measurement, control, feed-forward)
  • Single simulation/spec target (one executable spec loading voxel plan and paths)
Relation to the AutoPhi Stack
Project Relation to 18

02 (AutoPhi Modern) Product consolidation; 18 is the future vision informing voxel and path evolution. 02 holds the quantum-classical hybrid IC designs (39,756+ handoff files), REV_H 800× scaled design.

24 (AutoPhi Scale) Foundry packages; 18’s build script sources 24 by default for Blu-ray content. RTL, synthesis, and OpenLANE flows.

27 (Scale Ultimate) Voxel die building, hybrid/light/quantum cores, segment RTL. 18’s cell and chromosome concepts apply to 27’s voxel grid. Seed RTL (autophi_voxel_blank) comes from 27. Segment GDSII completed.

28 (Complete Unit) Single-chip, CPU–accelerator symmetry. 18’s whole-quantum and path options inform 28’s unified die specification.

RAG (Retrieval-Augmented Generation) Sources
Priority Source Description

1 96-333-fixed.csv CSV catalogue: ~1,759 rows of product/deposition entries (Magento-style); deposition titles, light trigger, semiconductor, patent references

2 Yesterday.txt AutoPhi $2.8475T portfolio: AQCHS, 142 IC designs, applications, markets, valuation

3 18 concept docs VOXEL_CELL_DNA, VOXEL_PATHS, VOXEL_PLANT_CHIP_LIGHT_FORM, NOTES_OVERCOME_*, and all other documentation

Optional 1 light trigger.txt Full text for the “1 light trigger” deposition (~1,770 lines)
Software Stack
  • AutoPhi Quantum OS — Operating system
  • AutoPhi Quantum Runtime Environment
  • AutoPhi Neural Framework — AI framework
  • AutoPhi Quantum SDK — Development tools
  • AutoPhi Application Suite — Complete applications
Complete Repository Structure
Folder / File Description

docs/ All written documentation (37+ files): product ratio, seed matrix, pitch, licensing, RAG, voxel/light-form concepts, processor comparison, chip series, deposition, valuation, miracle calculation, sell and distribute, quantum and how chips are made, engineering notes (overcome 02/24/25/26), needs and improvements (27/28), code name AES, and more

pitch/ HTML pitch pages (19 files) and images (8 PNG files): index.html, deep-dive.html, deep-dive-exhaustive.html, deposition.html, sales-pitch-complete.html, miracle-calculation.html, valuation.html, essay-19-into-18.html, deep-view-7t.html, logical-sales-pitch.html, sales-description.html, sales-description-embed.html, wordpress-seed-voxel-foundation.html/.md/.wxr

seeds/ Seed matrix template (CSV), example (JSON), SEED.yaml manifest, and OpenLANE2 GDSII/LEF outputs when present

rag/ Standalone RAG data: 96-333-fixed.csv, Yesterday.txt, 1 light trigger.txt, 18-docs/ (copy of key docs)

scripts/ Build and seed flow: build_bluray_foundry.bat/.py, run_seed_openlane_wsl.sh, apply_openlane2_nix_patch.sh, nix/ (openlane2-disable-doCheck.patch), openlane_seed_design/ (autophi_voxel_blank.v, config.json, runs/)

19-autophi-miracle/ Subproject: Re-engineered AutoPhi Future; docs, pitch, seeds, 24_bluray_test

20-autophi-future-three/ Subproject: Third version of the Future; docs, pitch, seeds, scripts with completed OpenLANE2 runs

MANIFEST.json Machine-readable manifest: 7,661 total files across all subprojects
LICENSE Proprietary; all rights reserved; patent notice
CITATION.cff Citation metadata with USPTO application references
.gitattributes Git configuration
Documentation Inventory (docs/ Folder)
Document Subject
START_HERE.md Quick-link navigation for new users
SALES_DESCRIPTION.md Full sales description (short, full, and long-form)
DEEP_DIVE_EXHAUSTIVE_PITCH.md Exhaustive reveal of the project: 12 sections
DEEP_VIEW_7T.md Deep view for the 7T ask; break rules, make way
LOGICAL_SALES_PITCH.md Single exhaustive logical sales pitch; all deep dives unified
DEPOSITION_AUTOPHI_FUTURE.md Formal deposition statement (9 sections)

PRODUCT_RATIO.md The product: the ratio of instruction set to calculation and performance per exchange

MIRACLE_CALCULATION.md The outcome to be found: ZettaFLOPS in real H×W
VALUATION.md Indicative valuation; $500B is not even close
ESSAY_19_INTO_18.md The unrational change: putting 19 into 18
CHIP_SERIES_CPU_GPU_DPU.md Six-tier chip series with YAML data model

chip_series_cpu_gpu_dpu.yaml Structured YAML: series name, axes, six tiers with COGS/CPU/GPU/DPU/all-in-one

PERFORMANCE_AND_COGS_SUMMARY.md One-page performance metrics and decisive COGS
CODE_NAME_ACTUAL_BRONZE.md AES code name for “ACTUAL” (bronze, real to touch)

VOXEL_CELL_DNA_AND_PHOTON_CHROMOSOMES.md Voxel as cell; DNA-style encoding; photon chromosome

VOXEL_PATHS_AND_WHOLE_QUANTUM_OPTIONS.md Voxel arrangement plans and paths; whole-quantum calculation options

VOXEL_PLANT_CHIP_LIGHT_FORM.md Metal tree; data flow; light as real form; tree roles
PROCESSOR_POWER_COMPARISON.md AutoPhi vs other processors (H100, M4, EPYC/Xeon)
ALL_COMPONENTS_FROM_RAG.md Consolidated component list from all RAG sources
SEED_FOR_GROWING_CHIPS.md Seed definition: canonical set + executable seeds
SEED_MATRIX_FORMULA.md Full matrix formula table with variable definitions
SEED_MATRIX_IMPORT.md Import instructions: CSV/JSON, any size, no small tool required
SEED_VOXEL_OPENLANE2.md How to build the seed voxel with OpenLANE2
SEED_GROWTH_3NM_5NM.md Growth path from 130 nm to 3 nm and 5 nm

SEED_VOXEL_BIGGER_BETTER_MORE.md Traditional methods to incorporate or evade; foreseen results; all options

SEED_RUN_COMPLETE.txt Summary of seed run output locations
QUANTUM_AND_HOW_CHIPS_ARE_MADE.md Quantum vs classical; concrete chip-making flow
DISTRIBUTION_AND_LICENSING.md Distribution options and licensing guidance
SELL_AND_DISTRIBUTE.md Readiness checklist for sales and distribution
REENGINEERING_19.md Why 19 exists; what was carried over and improved
RAG_FOR_18.md RAG index order and usage for Project 18
RAG_FOR_19.md RAG index order and usage for Project 19

NOTES_OVERCOME_02_QUANTUM_PROCESSOR.md Engineering challenges overcome in 02-autophi-quantum-processor

NOTES_OVERCOME_24_25_26.md Engineering challenges overcome in Scale 24, 25, 26
27_28_NEEDS_AND_IMPROVEMENTS.md Needs and improvements for Projects 27 and 28
PARTS_NEED_IMPROVEMENT.md Cross-project improvement tracking
What Is in the Package
  • Source folder: 18-autophi-future
  • Archive: 18-autophi-future.crione.zip
  • 130 files at top level; 7,661 total files including all subprojects and OpenLANE2 run artefacts
  • Archive size: 49.2 MB
  • Principal file types at top level: .md: 64, .html: 19, .txt: 11, .png: 8
  • Full file categories (MANIFEST.json): Data: 2,743; EDA flow output: 2,527; Documentation: 990; Other: 980; HDL (Verilog): 256; Chemistry/bio: 108; Web: 32; Source code: 11; Images: 8; Layout (GDSII): 6
  • Top extensions across all subprojects: .json: 2,704; .rpt: 1,768; .txt: 728; .log: 504; .md: 262; .v (Verilog): 244; .def: 143; .sdc: 124; .sdf: 108; .lib: 76; .odb: 41; .html: 32
  • Includes completed OpenLANE2 runs with GDSII, LEF, netlist, DEF, timing reports, DRC/LVS reports
  • Key layout artefacts: autophi_voxel_blank.gds, autophi_voxel_blank.magic.gds, autophi_voxel_blank.klayout.gds (run 2026-02-07)
  • Seed manifest: seeds/SEED.yaml (version 1)
  • Seed matrix template: seeds/seed_matrix_template.csv
  • Seed matrix example: seeds/seed_matrix_example.json
  • Blu-ray build scripts: scripts/build_bluray_foundry.bat , scripts/build_bluray_foundry.py
  • OpenLANE2 seed scripts: scripts/run_seed_openlane_wsl.sh , scripts/apply_openlane2_nix_patch.sh
  • Nix patch: scripts/nix/openlane2-disable-doCheck.patch
  • Executable seed RTL: scripts/openlane_seed_design/autophi_voxel_blank.v (39 lines of Verilog)
  • OpenLANE2 config: scripts/openlane_seed_design/config.json
  • RAG sources: rag/96-333-fixed.csv , rag/Yesterday.txt , rag/1 light trigger.txt , rag/18-docs/
  • Pitch images: 18-future-autophi-hero.png, 18-future-tiers-arc.png, 18-future-one-seed-many-harvests.png, 18-future-photorealistic-chip.png, 18-future-patent-descriptive.png, autophi-future-photoreal-workspace-gds.png, autophi-future-photoreal-die-or-package.png
  • WordPress import: wordpress-seed-voxel-foundation.wxr (categories and tags)
  • Subproject 19-autophi-miracle: complete with docs, pitch, 24_bluray_test (Blu-ray test output)
  • Subproject 20-autophi-future-three: third version with completed OpenLANE2 runs, docs, pitch, seeds
  • MANIFEST.json, LICENSE, CITATION.cff, .gitattributes

How this is delivered

This package ships on a single Blu-ray disc, posted to the delivery address on your order. The archive on the disc is AES-256 encrypted; the passphrase is sent separately, by email, once the disc is despatched — so the disc alone is of no use to anyone who intercepts it.

Discs are despatched by tracked, signed-for post. Allow 5 business days for mastering and verification before despatch.

© 2026 Christopher Gabriel Brown. All rights reserved.

Disclaimer: All products on this store are fictional ICs and designs. They are conceptual, speculative, and intended for research, development, and educational purposes. No physical semiconductor is shipped. What is delivered is the intellectual property, documentation, RTL, EDA artefacts, and design data as described above.

Photo

Green PCB with a glowing white central chip on black

Footnotes

  1. Product number 8465.
  2. Family: autophi on demand.
  3. Purchase: When you buy, you buy the use of that blueprint only.
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