76-qbeam-transfer

Status: Foundry-ready (L4). Full SPEC + BOM + 12-layer STACKUP + wire-protocol specification + host-driver ABI contract on file. Physical-design flow output present for all 12 silicon generations (APM01-D-QPHY through APM12-D-QPHY). Each generation ships a canonical 44-line FOUNDRY_HANDOFF.md. QBeam is a filed non-provisional USPTO utility patent. Patent alignment verified against ExitPhi patent text. ASIC RTL scaffolding, link firmware (C), host daemon scaffolding (Rust), and SDK source (C + Python + Rust) included. Reference-board BOM drafted to hand off to a contract manufacturer for schematic capture and layout. KiCad schematic capture, PCB layout, Gerber generation, prototype fab, bring-up, PCIe 5.0 PCI-SIG compliance, FIPS 140-3 crypto-module certification, and interop testing against AutoPhi endpoint boards are buyer/CM/cert-lab scope.

The Quantum PHY QBeam Transfer Card is a single PCIe 5.0 x16 half-height half-length (HHHL) host bus adapter (HBA) that presents the patented QBeam physical layer as a plain byte-oriented fabric interface. The card carries classical payloads only — files, RDMA, NVMe-oF, model weights, ledger writes, and control traffic — between AutoPhi accelerator boards housed in the same chassis, rack, or row. No qubits are placed on the wire. No teleportation is performed. The QBeam PHY silicon is reused for its classical-modulation properties (density, thermal integrity, cable-freeness) and nothing else.

The card sits in a standard PCIe 5.0 x16 slot. On the bracket side it exposes four QBeam lanes in SFF-8674 cages; on the host side it enumerates as a single PCIe function with SR-IOV support for up to 64 virtual functions. Design-target aggregate bandwidth is 400 GB/s bidirectional (4 lanes × 100 GB/s per lane) with a 400 ns cut-through latency budget from Host A doorbell write to Host B DMA write.

The product line comprises 13 purchasable SKUs: 12 silicon configurations (APM01-D-QPHY through APM12-D-QPHY, one per AutoPhi Modern generation, spanning 7 nm to 2 nm) plus the umbrella reference HBA board design. The reference HBA ships with the APM07-D-QPHY (3 nm, IFS 18A) as the mid-generation shipping baseline; any variant APM04 through APM12 drops in mechanically compatible.

The QBeam physical layer, invented and filed as part of the ExitPhi patent application (USPTO App# 19/722,805), was originally shown to modulate a quantum carrier for wireless quantum-to-quantum teleportation. Two invariants of the invention — CoolBeam thermal integrity and PipeBeam temporal alignment — are carrier-agnostic. When the classical-mode strap on the qbeam_lane macro is asserted, the analog front-end delivers a byte-oriented modulation with three measurable properties superior to copper-serdes or optical-fiber alternatives:

The card connects AutoPhi accelerator boards (PCIe5-256, BGA256, PCIe5-1536, and related V19 catalog SKUs) across a QBeam fabric. Each host runs Linux or Windows. The fabric is defined as the collection of Quantum PHY HBAs plus the QBeam wire runs connecting them. Routing is fabric-local; each HBA knows its own Local Identifier (LID) and the peer LIDs on each of its 4 QBeam ports.

The APM01-D-QPHY is a variant of the APM01-D Nexus Core (Data Processing Unit) from the AutoPhi Modern family. The variant swaps the Nexus Core’s baseline 2× 400 GbE MACs for 4× QBeam classical-mode PHY lanes, adds a PCIe 5.0 x16 endpoint, and upgrades the AES-256-GCM crypto engine to per-lane parallel. All other Nexus Core features are retained: 8 Light Trigger cores, 32 programmable packet processors, hardware compression (LZ4, Zstd), regex/pattern-matching engine, NVMe-oF target/initiator (32 queues), RAID/erasure-coding engine, RDMA (RoCEv2-shim) queue pairs, and a 512-neuron anomaly-detection co-processor.

APM07-D-QPHY (bold) is the shipping baseline of the reference HBA. Package: FCBGA-1024, 35×35 mm. Any variant APM04 through APM12 drops in mechanically compatible. Package families across the line: QFN-56 (single-lane variant), BGA-324 (dual-lane variant), FCBGA-1024 (flagship 4-lane variant).

Power source: Slot-only (12 V + 3.3 V from the PCIe slot). No external power connector. Total board dissipation: 42 W typical, 68 W max (within the 75 W CEM 5.0 slot budget). U1 core dissipation: 38 W typical.

Total thickness: 1.60 mm (±10%). Material: FR-4 Tg170, halogen-free. Surface finish: ENIG (0.05 µm Au over 3 µm Ni min). Solder mask: LPI green, both sides. Silkscreen: white epoxy, both sides. Flammability: UL 94V-0. Manufacturing class: IPC-6012 Class 6 (signal layers), IPC-A-600 Class 3 (finished appearance).

The on-chip firmware (running on Light Trigger cores) implements a 10-state link state machine:

APM03 runs both flows for cross-validation: sky130 evaluation build feeds an IFS N7-equivalent risk build before production.

Each HBA exposes 4 QBeam ports on the bracket. Recommended topologies:

Beyond one facility, the recommended product is AeroPhi (Project 55) with its six-tier fractal mesh.

Source, RTL, revenue, and contracts do not co-mingle across families. Each buyer signs their own LICENSE with the inventor.

U1 (APM07-D-QPHY) cost is inventor-set and included in the finished-card list price. Sample lead time from tape-out: 20 weeks; production lead time: 26 weeks.

The following marks are used but not registered as of this document’s date: “Quantum PHY,” “QPHY,” “QBeam,” “CoolBeam,” “PipeBeam,” “ExitPhi,” “AeroPhi,” “AutoPhi,” “cri-one.” “QPHY” is a downstream product name coined at cri-one.com; the canonical patent term is “QBeam.”

This package ships on a single Blu-ray disc, posted to the delivery address on your order. The archive on the disc is AES-256 encrypted; the passphrase is sent separately, by email, once the disc is despatched — so the disc alone is of no use to anyone who intercepts it.

Discs are despatched by tracked, signed-for post. Allow 5 business days for mastering and verification before despatch.

© 2026 Christopher Gabriel Brown. All rights reserved.