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45-all-autophi-boards

This is the technical specification. The deliverable it describes is the full 45-all-autophi-boards blueprint package.

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Inventor: Christopher Gabriel Brown
Patents: USPTO 18/370,908  |  19/403,339  |  3561/2876  |  1026  |  1096–1098  |  1105  |  3559. Patent pending; all rights to seek additional patent protection are expressly reserved by the inventor.
Status: Research & Development — BGA library release v1 frozen; 34-board pipeline operational; schematic and routing automation complete.
The 45-all-autophi-boards package is the unified deliverable containing every AutoPhi PCIe 5.0 accelerator board design, spanning three coordinated sub-projects and one cross-project tooling directory. It consolidates 518 source files covering two proprietary BGA package definitions (256-ball and 1,536-ball), 34 I/O bracket board variants, a fully automated fork-place-route-verify-export pipeline derived from the Texas Instruments TIDA-00423 PCIe Gen 3 reference design, and the canonical BGA component library that all downstream board projects consume as their single source of truth.
The core AutoPhi V19 Pinnacle IC sits in a custom BGA package (10 mm flat, 32 mm width, sub-100 W) and connects through four TI DS80PCI810 PCIe retimers to a standard PCIe x16 edge connector on a PCI-SIG-compliant half-height half-length (HHHL) card outline. All 34 board variants share the same core PCB layout—identical IC, retimer, DDR3, and passive placement—and differ only in the I/O bracket connector at J2/J3, enabling one design to serve data-center, telecom, automotive, industrial, aerospace, medical, consumer, RF, and debug applications.
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Total BOM: ~352 unique component references per board; ~2,390 total pads; ~323 nets; ~232 signal nets routed per variant.
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Full 16-lane PCIe Gen3 bidirectional link with AC coupling at four points per lane:
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Total AC coupling capacitors: 8 per lane x 16 lanes = 128 caps, all 0.1 uF 0402 X5R 16V.
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Retimer decoupling: 8 caps per retimer x 4 retimers = 32 caps (10 uF bulk + 1 uF mid + 0.1 uF fine per VIN pin; 0.1 uF per VDD pin).
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The pipeline transforms the TI TIDA-00423 reference design into 34 production-ready board variants in five automated stages, driven by 33 Python scripts totaling approximately 14,000 lines of code.
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One-command build: python blueprints/build_all.py — runs fork, SVG render, collision check, Magento CSV, preview HTML. Output: OK: 34 boards, 0 collisions.
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The auto-generated HTML schematic viewer organizes the design into 18 color-coded sections:
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Delivery: Shipped on a single Blu-ray disc. All files are AES-256 encrypted. Dispatched by tracked post.
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© 2026 Christopher Gabriel Brown. All rights reserved. Patent pending. No intellectual property is conveyed with the deliverable. The underlying copyrighted material and the method-claim patent strategy remain the property of the inventor.
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