44-autophi-pcie5-1536

The AutoPhi PCIe 5.0 1536 is the top-of-line member of the AutoPhi PCIe 5.0 family. It shares its outline, its bracket-mount geometry, and its I/O philosophy with the 34 variant boards that were forked from Texas Instruments TIDA-00423 (a PCIe Gen 3 reference design using DS80PCI810 retimers), but it departs from those variants in one decisive respect: it hosts the 1536-ball AutoPhi BGA as U16, and it is placed, escaped, and routed for that package. The BGA-1536 dominates the right-hand third of the card; the left two thirds carry the retimer chain, the DDR3 sub-system, the sideband management interface, and the QSFP28 optical front end.

The card is a full-height add-in card in outline (256.625 mm long, 111.95 mm tall body plus 12.72 mm card-edge tab), fabricated on Megtron 6 low-loss laminate for PCIe Gen 5 (32 GT/s) signal integrity, finished in ENIG for BGA planarity, and built to a 12-copper-layer, symmetric stackup with two dedicated ground reference planes flanking the PCIe high-speed differential pairs. Controlled impedance is targeted at 85 Ω differential on PCIe, 100 Ω differential on QSFP28 SerDes, 40 Ω single-ended on the DDR3 byte lanes, and 50 Ω single-ended generic. The routing state is measured at 8388 track segments, 1997 vias (1753 through, 222 micro, 22 blind), and 37 copper zones; 128 items remain unconnected and 298 DRC errors remain open, as engineering artefacts rather than as rendered defects (see § “Routing State and Engineering Status”).

The card ships not as a bare-board fabrication release — the design record does not authorise fabrication release — but as a complete engineering data package: the working KiCad PCB and project files, the hierarchical KiCad schematic set, the extracted netlists (KiCad native, XML, and EasyEDA-compatible), the flat BOM (CSV), the Specctra DSN/SES routing pair, the design-rule and stackup specifications, the pinmap for the 1536-ball BGA, the entire 33-script Python pipeline that fork-and-routes the TIDA-00423 into any of the 34 I/O variants, the RAG rule bases that supply net-class widths and clearances, and the render specification against which the marketing imagery was produced. The delivery medium is AES-256-encrypted Blu-ray, described at the end of this listing.

The outline is drawn as one properly closed loop of 24 straight segments and 4 arcs — not a bounding rectangle — and it is identical to the coordinate for coordinate in all seven main board variants of the AutoPhi PCIe 5.0 family. Only _fixed.kicad_pcb differs (257.197 × 110.270 mm) and it is not the working file.

Standards note. 256.625 mm is not a standard PCIe length — PCIe half-length is 167.65 mm, full-length 312.00 mm — and 111.95 mm is 0.80 mm over the 111.15 mm full-height figure. The loop is closed and manufacturable, so this is deliberate drawn geometry rather than a leftover default, but the design record does not disclose why it departs from the standard. Purchasers should not describe the card as “full-height full-length”; the geometry does not support the phrase.

The stackup as configured in autophi-pcie5-qsfp28-optical-1536.kicad_pcb. Two representations of copper weight coexist in the record: an even 0.5 oz on all inner layers (JLCPCB target), and a heavier 1 oz signal / 2 oz power split (Advanced Circuits target). Both are included below and the actual delivered value depends on which fab is selected at production time. The physical layer count and role of every layer are identical across both.

Symmetric stackup is required for BGA-1536 reflow flatness. Total finished thickness is 1.6 mm nominal.

Standard FR-4 exhibits Df ≈ 0.02 at 10 GHz — roughly ten times the loss of Megtron 6 — which becomes prohibitive for PCIe 5.0 (32 GT/s) trace lengths beyond a few inches. Megtron 6 is the de-facto standard for PCIe 4.0/5.0 server hardware. Comparable substitutes accepted by the design (Df ≤ 0.005 at 10 GHz, Dk 3.6–3.8) are Isola I-Tera MT40, Rogers RO4830 / RO4835, and Nelco N4000-13EPSI.

KiCad's authoritative component count is 525: 373 on the front, 152 on the back. Front component density is 22.41%; back is 1.57%. This is a densely populated card, and the contrast with the project 35 tier boards' 46 parts is the whole point. The file holds 548 (footprint blocks and the extract_pcb_placement.py utility resolves 523 with positions; KiCad's 525 is the authoritative count.

U16 dominates the right-hand third. At 95 × 90 mm centred on (203.50, 49.17) the BGA-1536 spans X 156…251 and Y 4.2…94.2, leaving roughly 5 mm to the right board edge and 4 mm to the top edge. On a 256 × 112 mm card it occupies about one third of the length and nearly the full height. This is the opposite of the project 35 tier boards, where the largest part is a 7 × 7 mm QFN. Any depiction of this card that fails to make U16 the visual subject is factually wrong.

The board is routed, substantially but not completely, in the -sesimport variants. Measured against the project's own design rules (not KiCad's stock defaults — see the “DRC Trap” note below):

This is HDI-class work, consistent with the project's declared minimums: 0.0762 mm track, 0.2032 mm via, 0.127 mm hole. The 298 open errors are dominated by 159 clearance violations (netclass Power wants 0.150 mm, actual 0.1331 mm — a near-miss, not a collision), 82 front solder-mask bridges, 38 starved thermal reliefs, and 12 shorting items. The shorts are the only category that is unambiguously serious and must be resolved before any fabrication release.

DRC trap. kicad-cli pcb drc reads design rules from the sibling .kicad_pro. The -RICHER and -RICHER-MODELS variants have no project file, so KiCad silently falls back to stock defaults — min track 0.2 mm, via 0.5 mm, hole 0.3 mm, annular 0.1 mm. This board is HDI: 0.125 mm tracks, 0.36 mm vias, 0.2032 mm drills. Run against the defaults it reports ~1200 phantom track_width / via_diameter / annular_width / drill_out_of_range errors that are purely an artefact of the missing file. Always DRC -FILLED-sesimport, which has its .kicad_pro.

Guard-band to other pairs (guard_mm) is 0.508 mm (20 mil, 5W-style) for both pcie_diff and refclk. Maximum via pair counts are 4 (TX) / 2 (RX) for pcie_diff; 2 / 2 for refclk. Route order follows lower priority = routed earlier: high-speed differentials and reference clock first, then DDR, then control, then power — a citation-based ordering that lives in autophi_engine/rag/routing.py.

The design specifically avoids blind/buried vias (outside JLCPCB standard process) and uses layer-specific through-vias where a restricted electrical connection is required. Maximum hole aspect ratio 10:1 (1.6 mm board → 0.16 mm min drill; 0.20 mm is used).

The design uses a reusable anchor standard for the primary BGA and left-edge IN/OUT connectors, so the same cluster can be re-used across the 34 I/O variants without re-authoring geometry:

Connector locking rule: J2 and J3 keep fixed deltas from U1; when the BGA moves, both connectors translate by the same vector, preserving IN/OUT spacing across variants. This is enforced by blueprints/apply_bga_io_standard.py.

This board is not a hand-drawn artefact. It is one deterministic output of a 33-script, approximately 14,000-line Python pipeline that transforms the Texas Instruments TIDA-00423 reference design into all 34 AutoPhi PCIe 5.0 product variants. A one-command driver, python blueprints/build_all.py, runs the five pipeline stages: fork → place → route → DRC → export. The complete pipeline is included on the delivery media.

The router (auto_route.py) is a grid A* maze router that writes the .kicad_pcb file in place. After each successful write it invokes kicad-cli pcb drc when the CLI is on PATH or at a typical Windows install location (override with KICAD_CLI). Notable behaviours:

render_board_svg.py is a pure-Python SVG renderer that bypasses kicad-cli (which cannot open the forked .kicad_pcb files — the fork header claims version 20260206 but uses older tstamp s-expressions). The renderer draws front parts in gold pads (#e7b74d) with white courtyard outlines, back parts in cyan pads (#5dc1d9) with muted cyan outlines, and every SMD gets a bounding-box outline so collisions are visible at a glance.

The active schematic is a hierarchical KiCad tree (generator 2.1) with an index sheet at blueprints/boards/01-qsfp28-optical/autophi-pcie5-qsfp28-optical.kicad_sch and subsheets under autophi-v19-variant-01-qsfp28-optical_sheets/. Sheets are:

The netlist is available in four representations: KiCad native .net, KiCad .xml, EasyEDA-compatible .json and .net, and a flat .csv BOM. The TI TIDA-00423 complete netlist is included as both structured JSON and rendered Markdown for provenance.

Sourcing policy: the AutoPhi BGA-1536 die and package program (U16) is the only custom / non-catalogue silicon on the card. Every other line item is chosen from commercial-vendor catalogues (Texas Instruments where the reference design calls for it — e.g. DS80PCI810 retimers — plus DRAM, connectors, passives, PMICs, etc. from their normal supply chains and MPNs).

Ballpark is a 5-piece prototype of roughly 6 × 4 inch (152 × 102 mm) area; the 1536 board's 256.625 × 111.95 mm outline is larger and cost scales proportionally. Lead time: 2–3 weeks standard, 7–10 days rush (1.5×–2× cost).

The following are explicitly absent from the design record and are called out here so the purchaser is not misled:

This listing delivers the complete engineering data package for the AutoPhi PCIe 5.0 1536 board on a single AES-256-encrypted Blu-ray, containing:

Not included: physical fabricated PCB, physical BGA-1536 silicon, any physical hardware whatsoever, any right to fabricate at scale, any right to redistribute the pipeline sources, any right to re-brand the AutoPhi silicon program.

Delivered on a single-layer or dual-layer Blu-ray disc (25 GB or 50 GB, sized to the archive), written as a UDF 2.60 volume, with the entire payload sealed inside an AES-256-CBC encrypted archive. The decryption passphrase is transmitted separately to the purchaser's verified e-mail address of record on cri-one.com/store after the order clears, and never appears on the disc, its case, or its printed label. Discs are hand-labelled with SKU 2074 and the project key 44-autophi-pcie5-1536, packaged in a rigid case, and shipped by tracked courier. On receipt, verify the disc's SHA-256 against the value provided in the shipping e-mail before decrypting; if the hashes disagree, do not proceed — contact the store and return the disc for replacement. The passphrase, once used, should be stored offline; loss of the passphrase means loss of access to the archive, and neither the store nor the inventor retains a copy.

© 2026 Christopher Gabriel Brown. All rights reserved.